Speech Processing on a Reconfigurable Analog Platform

We describe architectures for audio classification front ends on a reconfigurable analog platform. Real-time implementation of audio processing algorithms involving discrete-time signals tend to be power-intensive. We present an alternate continuous-time system implementation of a noise-suppression...

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Veröffentlicht in:IEEE transactions on very large scale integration (VLSI) systems 2014-02, Vol.22 (2), p.430-433
Hauptverfasser: Ramakrishnan, Shubha, Basu, Arindam, Leung Kin Chiu, Hasler, Jennifer, Anderson, David, Brink, Stephen
Format: Artikel
Sprache:eng
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Zusammenfassung:We describe architectures for audio classification front ends on a reconfigurable analog platform. Real-time implementation of audio processing algorithms involving discrete-time signals tend to be power-intensive. We present an alternate continuous-time system implementation of a noise-suppression algorithm on our reconfigurable chip, while detailing the design considerations. We also describe a framework that enables future implementations of other speech processing algorithms, classifier front ends, and hearing aids.
ISSN:1063-8210
1557-9999
DOI:10.1109/TVLSI.2013.2241089