System-in-Packages with Low Power Loss for Future Voltage Regulators

This paper presents Cu-plate-bonded and capacitor-mounted SiPs for voltage regulators. The Cu-plate-bonded SiP reduces the power loss by 23% compared to those of a SiP with wire bonding. Copper plates reduce the spreading resistance of the topside electrodes in the MOSFETs, leading to lower power loss. The parasitic inductance of the capacitor-mounted SiP is reduced to 56% of that of the SiPs having the input capacitor mounted on the PCB. This reduction is due to the short current loop from the input capacitor to the MOSFETs. As a result, the power loss can be reduced by 20% for the same spike voltage. The high-side MOSFET die is flipped so that the drain electrode faces up, facilitating the connection of the drain electrode of the high-side MOSFET and the source electrode of the low-side MOSFET to the mounted input capacitor.