High-[Formula Omitted] Inductors Embedded in the Fan-Out Area of an eWLB

We investigate high-quality (high-[Formula Omitted]) inductors implemented in the redistribution layer (RDL) of the fan-in and fan-out area of an embedded wafer-level ball grid array (eWLB) package. The eWLB is an innovative package technology introduced recently for wireless applications. The technology has outstanding capabilities especially for high-frequency and millimeter-wave package design. We demonstrate that inductors realized in the eWLB fan-out area have negligible substrate losses and lower parasitic capacitances compared to inductors in the eWLB fan-in area. As a result, the inductors implemented in the fan-out area offer significantly higher quality factors and higher self-resonance frequencies. We investigate the effects of the chip-to-package interconnection. We show that the chip-to-package transition creates a bottleneck for the integration of high-[Formula Omitted] inductors. We demonstrate the advantages of inductors in the fan-out area of the eWLB on the example of a 6-GHz voltage-controlled oscillator (VCO) chip manufactured in a 65-nm complementary metal-oxide-semiconductor process and assembled in an eWLB package. For the [Formula Omitted] tank of this example, we use a 1.1-nH high-[Formula Omitted] differential fan-out eWLB inductor to reduce the phase noise. For comparison, we investigate a VCO fabricated with a standard on-chip inductor and assembled in the identical eWLB package. Our measurement results demonstrate lower phase noise and higher output power for all VCOs with inductors embedded in the RDL compared to the reference VCO with the on-chip inductor. The measured phase noise for the VCO with the eWLB inductor in the fan-out area is in the best case 9 dB lower than that of the reference VCO with the on-chip inductor. The presented results prove the integration concept and demonstrate the excellent potential of embedded inductors realized in the fan-out area of the eWLB package.