High-Reliability Dynamic-Threshold Source-Side Injection for 2-Bit/Cell With MLC Operation of Wrapped Select-Gate SONOS in nor-Type Flash Memory

High-Reliability Dynamic-Threshold Source-Side Injection for 2-Bit/Cell With MLC Operation of Wrapped Select-Gate SONOS in nor-Type Flash Memory

For the first time, a high-performance (τ PGM = 200 ns/τ ERS = 5 ms) cell with superior reliability characteristics is demonstrated in a nor-type architecture, using dynamic-threshold source-side injection (DTSSI) in a wrapped select-gate silicon-oxide-nitride-oxide-silicon memory device, with multi...

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Veröffentlicht in:IEEE transactions on electron devices 2010-09, Vol.57 (9), p.2335-2338
Hauptverfasser: Wang, Kuan-Ti, Chao, Tien-Sheng, Wu, Woei-Cherng, Yang, Wen-Luh, Lee, Chien-Hsing, Hsieh, Tsung-Min, Liou, Jhyy-Cheng, Wang, Shen-De, Chen, Tzu-Ping, Chen, Chien-Hung, Lin, Chih-Hung, Chen, Hwi-Huang
Format: Artikel
Sprache:eng
Schlagworte:
Charge carrier processes
Computer architecture
Flash memory
Logic gates
Microprocessors
multilevel states in a cell (MLC)
nor
Reliability
silicon-oxide-nitride-oxide-silicon (SONOS)
SONOS devices
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Zusammenfassung:For the first time, a high-performance (τ PGM = 200 ns/τ ERS = 5 ms) cell with superior reliability characteristics is demonstrated in a nor-type architecture, using dynamic-threshold source-side injection (DTSSI) in a wrapped select-gate silicon-oxide-nitride-oxide-silicon memory device, with multilevel and 2-bit/cell operation. Using DTSSI enables easy extraction of the multilevel states with a tight V TH distribution, a nearly negligible second-bit effect, superior endurance characteristics, and good data retention.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2010.2054530