Gigahertz logic gates based on InP-MISFET's with minimal drain current drift

Three-input AND/NOR logic gates based on 3-µm overlapping gate InP-MISFET technology were fabricated and clocked at 1 GHz. The logic gates showed a propagation delay of ∼500-700 pS/gate for a channel length of 1.5 µm. Such high-speed performance was obtainable as a result of a novel process that was...

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Veröffentlicht in:IEEE electron device letters 1986-07, Vol.7 (7), p.407-409
Hauptverfasser: Pande, K.P., Fathimulla, M.A., Gutierrez, D., Messick, L.
Format: Artikel
Sprache:eng
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Zusammenfassung:Three-input AND/NOR logic gates based on 3-µm overlapping gate InP-MISFET technology were fabricated and clocked at 1 GHz. The logic gates showed a propagation delay of ∼500-700 pS/gate for a channel length of 1.5 µm. Such high-speed performance was obtainable as a result of a novel process that was used in the fabrication of the MISFET's. The process included the saturation of InP surface with phosphorus vapor and growth of a P 2 O x N 1-x interfacial layer followed by the deposition of an SiO 2 gate insulator. MISFET's that were utilized in the logic gates showed a channel mobility of ∼3700 cm 2 /V.s and less than 3-percent drain current drift.
ISSN:0741-3106
1558-0563
DOI:10.1109/EDL.1986.26418