REDUSA: module generation by automatic elimination of superfluous blocks in regular structures
An approach to module generation that does not require the construction of parametrized software procedures is presented. It is a design-by-example method that is based on the following concept: an example module (e.g., a 16-b multiplier) realizes a function between the set of input combinations and...
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Veröffentlicht in: | IEEE transactions on computer-aided design of integrated circuits and systems 1989-09, Vol.8 (9), p.989-998 |
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Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | An approach to module generation that does not require the construction of parametrized software procedures is presented. It is a design-by-example method that is based on the following concept: an example module (e.g., a 16-b multiplier) realizes a function between the set of input combinations and the set of output combinations. In many applications, only a subset of input combinations (e.g., 8-b instead of 16-b inputs) is used. The restriction of the module's function to this subset can be realized by a simpler module. REDUSA constructs this module automatically by a reduction of the example module. This approach offers important advantages in both the construction and verification aspected of module generators.< > |
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ISSN: | 0278-0070 1937-4151 |
DOI: | 10.1109/43.35551 |