A hierarchical computer architecture for distributed simulation
A methodology is developed to map hierarchical, modular discrete-event models onto a distributed simulated architecture, the hierarchical multibus multiprocessor architecture (HM/sup 2/A). The proposed architecture contains features closely reflecting the structure, behaviour, and modular properties...
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Veröffentlicht in: | IEEE transactions on computers 1989-02, Vol.38 (2), p.311-319 |
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Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | A methodology is developed to map hierarchical, modular discrete-event models onto a distributed simulated architecture, the hierarchical multibus multiprocessor architecture (HM/sup 2/A). The proposed architecture contains features closely reflecting the structure, behaviour, and modular properties of the model being simulated. Hence, this approach improves on previous approaches, which impose the model on a predesigned architecture.< > |
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ISSN: | 0018-9340 1557-9956 |
DOI: | 10.1109/12.16512 |