A 15-ns 1-Mbit CMOS SRAM

A 1-Mb CMOS static RAM with a 256 K word*4-bit configuration has been developed. The RAM was fabricated using 0.8- mu m double-poly and double-aluminum twin-well CMOS technology. A small cell size of 5.2 mu m*8.5 mu m and a chip size of 6.15 mm*15.21 mm have been achieved. A fast address access time of 15 ns was achieved using novel circuit techniques: a PMOS-load decoder and a three-stage dynamic gain control sense amplifier combined with an equalization technique and feedback capacitances. A low active current of 50 mA at 20 MHz and low standby currents of 15 mA (TTL) and 2 mu A (CMOS) were also attained.< >