A 16-Mbit/s adapter chip for the IBM token-ring local area network
The authors describe a 9.02*9.02-mm chip built in 1- mu m CMOS with two levels of metal and an additional mask level for fabricating capacitors. It contains both analog and digital circuits and has provisions for self-test. The function includes the transmitter, receiver, protocol handler, an microp...
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Veröffentlicht in: | IEEE journal of solid-state circuits 1989-12, Vol.24 (6), p.1647-1655 |
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Sprache: | eng |
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Zusammenfassung: | The authors describe a 9.02*9.02-mm chip built in 1- mu m CMOS with two levels of metal and an additional mask level for fabricating capacitors. It contains both analog and digital circuits and has provisions for self-test. The function includes the transmitter, receiver, protocol handler, an microprocessor, as well as interfaces for RAM/ROM storage, IBM PC bus, IBM PS/2 bus, IBM 3174 bus, and Motorola 68000 bus. The physical design terrains are formed by 24K circuits of standard cell gates, a 10K-circuit equivalent hand-honed custom microprocessor, and an analog macro. The chip operates from a single 5-V supply, and the power consumption is 0.8 W nominal at 16 Mb/s. The chip can also be operated at 4 Mb/s.< > |
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ISSN: | 0018-9200 1558-173X |
DOI: | 10.1109/4.45001 |