Packaging technology for the NEC SX-3 supercomputers

Packaging technology for the NEC SX-3 supercomputers

Since the performance of a computer system is mainly related to the machine cycle time, improvement of the logic circuit delay is the key for high-speed operations. In order to show how to reduce the logic circuit delay, the characteristics required for LSI chips and packaging technologies are discu...

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Veröffentlicht in:IEEE transactions on components, hybrids, and manufacturing technology hybrids, and manufacturing technology, 1992-08, Vol.15 (4), p.411-417
Hauptverfasser: Murano, H., Watari, T.
Format: Artikel
Sprache:eng
Schlagworte:
Applied sciences
Coaxial cables
Computers, microcomputers
Cooling
Delay effects
Electronics
Exact sciences and technology
Hardware
High performance computing
Integrated circuit interconnections
Large scale integration
Logic circuits
National electric code
Packaging machines
Supercomputers
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Zusammenfassung:Since the performance of a computer system is mainly related to the machine cycle time, improvement of the logic circuit delay is the key for high-speed operations. In order to show how to reduce the logic circuit delay, the characteristics required for LSI chips and packaging technologies are discussed and the technological trends in packaging and their limitations are considered. As a typical application of high-performance packaging technology, the NEC SX-3 Supercomputer packaging is introduced, featuring 9 in/sup 2/ polyimide-ceramic substrates, a microchip carrier, flipped TAB carrier (FTC), high-density multichip packaging, high-speed coaxial cable interconnections, and a water cooling system.< >
ISSN:0148-6411
1558-3082
DOI:10.1109/33.159867