High-Bitrate-Measurement-System-Oriented Lower-Jitter 113-Gbit/s 2:1 Multiplexer and 1:2 Demultiplexer Modules Using 1-μm InP/InGaAs/InP Double Heterojunction Bipolar Transistors : Analog Circuits and Related SoC Integration Technologies
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| Veröffentlicht in: | IEICE transactions on electronics 2013, Vol.96 (6), p.912-919 |
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| container_title | IEICE transactions on electronics |
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| creator | ARAYASHIKI, Yutaka KAMIZONO, Takashi OHKUBO, Yukio MATSUMOTO, Taisuke AMANO, Yoshiaki MATSUOKA, Yutaka |
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| fullrecord | <record><control><sourceid>pascalfrancis</sourceid><recordid>TN_cdi_pascalfrancis_primary_27428820</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>27428820</sourcerecordid><originalsourceid>FETCH-pascalfrancis_primary_274288203</originalsourceid><addsrcrecordid>eNqNj01OAkEQhSdGE_HnDrVx2WF6BmRkx48yGIlEcE2aoRiK9HRPunqi3M0zeBTPYGNcuHT1UlUv73t1ErVkr9MVMu2mp1ErvpO3IusmnfPognkfxzJLZNqKvnIqd2JI3imPYoaKG4cVGi8WB_ZYiWdHYcINPNk3dOKRvEcHUqZisibfZkj6EmaN9lRrfA8nZTYg-wmMsfqzndlNo5HhlcmUIMXnRwVTM29PzUQNOMgcxrZZa4QcA8DuG1N4sgaGVFutHCydMkzsrWPow8AobUsYkSsa8vwDfUGtjkUXdhSiPZbhpWPCEoudscFOyFfR2VZpxutfvYxuHu6Xo1zUigultwFSEK9qR5Vyh1XS6yRZlsTpf33fY4N6uw</addsrcrecordid><sourcetype>Index Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype></control><display><type>article</type><title>High-Bitrate-Measurement-System-Oriented Lower-Jitter 113-Gbit/s 2:1 Multiplexer and 1:2 Demultiplexer Modules Using 1-μm InP/InGaAs/InP Double Heterojunction Bipolar Transistors : Analog Circuits and Related SoC Integration Technologies</title><source>J-STAGE Free</source><creator>ARAYASHIKI, Yutaka ; KAMIZONO, Takashi ; OHKUBO, Yukio ; MATSUMOTO, Taisuke ; AMANO, Yoshiaki ; MATSUOKA, Yutaka</creator><creatorcontrib>ARAYASHIKI, Yutaka ; KAMIZONO, Takashi ; OHKUBO, Yukio ; MATSUMOTO, Taisuke ; AMANO, Yoshiaki ; MATSUOKA, Yutaka</creatorcontrib><identifier>ISSN: 0916-8524</identifier><identifier>EISSN: 1745-1353</identifier><language>eng</language><publisher>Oxford: Oxford University Press</publisher><subject>Applied sciences ; Circuit properties ; Design. Technologies. Operation analysis. Testing ; Electric, optical and optoelectronic circuits ; Electronic circuits ; Electronics ; Exact sciences and technology ; Integrated circuits ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; Switching, multiplexing, switched capacity circuits ; Testing, measurement, noise and reliability ; Transistors</subject><ispartof>IEICE transactions on electronics, 2013, Vol.96 (6), p.912-919</ispartof><rights>2014 INIST-CNRS</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>314,780,784,4024</link.rule.ids><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=27428820$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>ARAYASHIKI, Yutaka</creatorcontrib><creatorcontrib>KAMIZONO, Takashi</creatorcontrib><creatorcontrib>OHKUBO, Yukio</creatorcontrib><creatorcontrib>MATSUMOTO, Taisuke</creatorcontrib><creatorcontrib>AMANO, Yoshiaki</creatorcontrib><creatorcontrib>MATSUOKA, Yutaka</creatorcontrib><title>High-Bitrate-Measurement-System-Oriented Lower-Jitter 113-Gbit/s 2:1 Multiplexer and 1:2 Demultiplexer Modules Using 1-μm InP/InGaAs/InP Double Heterojunction Bipolar Transistors : Analog Circuits and Related SoC Integration Technologies</title><title>IEICE transactions on electronics</title><subject>Applied sciences</subject><subject>Circuit properties</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>Electric, optical and optoelectronic circuits</subject><subject>Electronic circuits</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Integrated circuits</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Switching, multiplexing, switched capacity circuits</subject><subject>Testing, measurement, noise and reliability</subject><subject>Transistors</subject><issn>0916-8524</issn><issn>1745-1353</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2013</creationdate><recordtype>article</recordtype><recordid>eNqNj01OAkEQhSdGE_HnDrVx2WF6BmRkx48yGIlEcE2aoRiK9HRPunqi3M0zeBTPYGNcuHT1UlUv73t1ErVkr9MVMu2mp1ErvpO3IusmnfPognkfxzJLZNqKvnIqd2JI3imPYoaKG4cVGi8WB_ZYiWdHYcINPNk3dOKRvEcHUqZisibfZkj6EmaN9lRrfA8nZTYg-wmMsfqzndlNo5HhlcmUIMXnRwVTM29PzUQNOMgcxrZZa4QcA8DuG1N4sgaGVFutHCydMkzsrWPow8AobUsYkSsa8vwDfUGtjkUXdhSiPZbhpWPCEoudscFOyFfR2VZpxutfvYxuHu6Xo1zUigultwFSEK9qR5Vyh1XS6yRZlsTpf33fY4N6uw</recordid><startdate>2013</startdate><enddate>2013</enddate><creator>ARAYASHIKI, Yutaka</creator><creator>KAMIZONO, Takashi</creator><creator>OHKUBO, Yukio</creator><creator>MATSUMOTO, Taisuke</creator><creator>AMANO, Yoshiaki</creator><creator>MATSUOKA, Yutaka</creator><general>Oxford University Press</general><scope>IQODW</scope></search><sort><creationdate>2013</creationdate><title>High-Bitrate-Measurement-System-Oriented Lower-Jitter 113-Gbit/s 2:1 Multiplexer and 1:2 Demultiplexer Modules Using 1-μm InP/InGaAs/InP Double Heterojunction Bipolar Transistors : Analog Circuits and Related SoC Integration Technologies</title><author>ARAYASHIKI, Yutaka ; KAMIZONO, Takashi ; OHKUBO, Yukio ; MATSUMOTO, Taisuke ; AMANO, Yoshiaki ; MATSUOKA, Yutaka</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-pascalfrancis_primary_274288203</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2013</creationdate><topic>Applied sciences</topic><topic>Circuit properties</topic><topic>Design. Technologies. Operation analysis. Testing</topic><topic>Electric, optical and optoelectronic circuits</topic><topic>Electronic circuits</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Integrated circuits</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Switching, multiplexing, switched capacity circuits</topic><topic>Testing, measurement, noise and reliability</topic><topic>Transistors</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>ARAYASHIKI, Yutaka</creatorcontrib><creatorcontrib>KAMIZONO, Takashi</creatorcontrib><creatorcontrib>OHKUBO, Yukio</creatorcontrib><creatorcontrib>MATSUMOTO, Taisuke</creatorcontrib><creatorcontrib>AMANO, Yoshiaki</creatorcontrib><creatorcontrib>MATSUOKA, Yutaka</creatorcontrib><collection>Pascal-Francis</collection><jtitle>IEICE transactions on electronics</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>ARAYASHIKI, Yutaka</au><au>KAMIZONO, Takashi</au><au>OHKUBO, Yukio</au><au>MATSUMOTO, Taisuke</au><au>AMANO, Yoshiaki</au><au>MATSUOKA, Yutaka</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>High-Bitrate-Measurement-System-Oriented Lower-Jitter 113-Gbit/s 2:1 Multiplexer and 1:2 Demultiplexer Modules Using 1-μm InP/InGaAs/InP Double Heterojunction Bipolar Transistors : Analog Circuits and Related SoC Integration Technologies</atitle><jtitle>IEICE transactions on electronics</jtitle><date>2013</date><risdate>2013</risdate><volume>96</volume><issue>6</issue><spage>912</spage><epage>919</epage><pages>912-919</pages><issn>0916-8524</issn><eissn>1745-1353</eissn><cop>Oxford</cop><pub>Oxford University Press</pub></addata></record> |
| fulltext | fulltext |
| identifier | ISSN: 0916-8524 |
| ispartof | IEICE transactions on electronics, 2013, Vol.96 (6), p.912-919 |
| issn | 0916-8524 1745-1353 |
| language | eng |
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| subjects | Applied sciences Circuit properties Design. Technologies. Operation analysis. Testing Electric, optical and optoelectronic circuits Electronic circuits Electronics Exact sciences and technology Integrated circuits Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Switching, multiplexing, switched capacity circuits Testing, measurement, noise and reliability Transistors |
| title | High-Bitrate-Measurement-System-Oriented Lower-Jitter 113-Gbit/s 2:1 Multiplexer and 1:2 Demultiplexer Modules Using 1-μm InP/InGaAs/InP Double Heterojunction Bipolar Transistors : Analog Circuits and Related SoC Integration Technologies |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-19T09%3A16%3A40IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-pascalfrancis&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=High-Bitrate-Measurement-System-Oriented%20Lower-Jitter%20113-Gbit/s%202:1%20Multiplexer%20and%201:2%20Demultiplexer%20Modules%20Using%201-%CE%BCm%20InP/InGaAs/InP%20Double%20Heterojunction%20Bipolar%20Transistors%20:%20Analog%20Circuits%20and%20Related%20SoC%20Integration%20Technologies&rft.jtitle=IEICE%20transactions%20on%20electronics&rft.au=ARAYASHIKI,%20Yutaka&rft.date=2013&rft.volume=96&rft.issue=6&rft.spage=912&rft.epage=919&rft.pages=912-919&rft.issn=0916-8524&rft.eissn=1745-1353&rft_id=info:doi/&rft_dat=%3Cpascalfrancis%3E27428820%3C/pascalfrancis%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |