A Standard-Cell Based On-Chip NMOS and PMOS Performance Monitor for Process Variability Compensation : Analog Circuits and Related SoC Integration Technologies
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| Veröffentlicht in: | IEICE transactions on electronics 2013, Vol.96 (6), p.894-902 |
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| container_title | IEICE transactions on electronics |
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| creator | YAMAGISHI, Toshiyuki SHIOZAWA, Tatsuo HORISAKI, Koji HARA, Hiroyuki UNEKAWA, Yasuo |
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| fulltext | fulltext |
| identifier | ISSN: 0916-8524 |
| ispartof | IEICE transactions on electronics, 2013, Vol.96 (6), p.894-902 |
| issn | 0916-8524 1745-1353 |
| language | eng |
| recordid | cdi_pascalfrancis_primary_27428818 |
| source | J-STAGE (Japan Science & Technology Information Aggregator, Electronic) Freely Available Titles - Japanese |
| subjects | Applied sciences Circuit properties Design. Technologies. Operation analysis. Testing Electric, optical and optoelectronic circuits Electronic circuits Electronics Exact sciences and technology Integrated circuits Oscillators, resonators, synthetizers Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Signal convertors Transistors |
| title | A Standard-Cell Based On-Chip NMOS and PMOS Performance Monitor for Process Variability Compensation : Analog Circuits and Related SoC Integration Technologies |
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