Some progress in the symbolic verification of timed automata

In this paper we discuss the practical difficulty of analyzing the behavior of timed automata and report some results obtained using an experimental BDD-based extension of KRONOS. We have treated examples originating from timing analysis of asynchronous boolean networks and CMOS circuits with delay...

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Hauptverfasser: Bozga, Marius, Maler, Oded, Pnueli, Amir, Yovine, Sergio
Format: Tagungsbericht
Sprache:eng
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Zusammenfassung:In this paper we discuss the practical difficulty of analyzing the behavior of timed automata and report some results obtained using an experimental BDD-based extension of KRONOS. We have treated examples originating from timing analysis of asynchronous boolean networks and CMOS circuits with delay uncertainties and the results outperform those obtained by previous implementations of timed automata verification tools.
ISSN:0302-9743
1611-3349
DOI:10.1007/3-540-63166-6_19