Heterojunction Intra-Band Tunnel FETs for Low-Voltage SRAMs

We propose heterojunction intra-band tunnel (HIBT) FETs based on different semiconductor materials (with matched lattice constants) for the source/drain (S/D) and channel. HIBT FETs have an energy band offset at the interface of the S/D and channel. As a result, carrier transport in the on state occurs by intra-band tunneling. We analyze the device characteristics of HIBT FETs with Si S/D and GaP channel for different values of band offsets. We show that, due to intra-band tunneling, HIBT FETs exhibit lower on current at iso-off current compared to Si double gate (DG) MOSFETs. However, the energy band offset at the S/D-channel interface leads to 40%-59% lower drain-induced barrier lowering/thinning and significantly reduced variation in off current across a range of supply voltages ( V DD ). Moreover, due to the heterovalent nature of S/D and channel materials, there is negligible dopant straggle in HIBT FETs, which further improves their process variation tolerance. We evaluate the impact of low off-current variations in HIBT FETs on 6T SRAM stability and leakage. Considering the worst case parameter variations at V DD = 0.4 V, HIBT-FET-based 6T SRAMs show 1.56X to 2.85X reduction in cell leakage, 1.28X to 1.58X increase in read static noise margin (SNM), 1.04X to 1.07X higher hold SNM, and 1.7X to 3X increase in write margin compared to Si-DG-MOSFET-based 6T SRAM. The enhancement of cell stability and reduction in cell leakage at low V DD under process variations make HIBT FETs suitable for low-voltage SRAMs.