$Simulation Study of Dominant Statistical Variability Sources in 32-nm High- \kappa/Metal Gate CMOS$

Simulation Study of Dominant Statistical Variability Sources in 32-nm High- \kappa/Metal Gate CMOS

Comprehensive 3-D simulations have been carried out and compared with experimental data highlighting the dominant sources of statistical variability in 32-nm high-κ/metal gate MOSFET technology. The statistical variability sources include random discrete dopants, line edge roughness, and metal gate...

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Veröffentlicht in:	IEEE electron device letters 2012-05, Vol.33 (5), p.643-645
Hauptverfasser:	Xingsheng Wang, Roy, G., Saxod, O., Bajolet, A., Juge, A., Asenov, A.
Format:	Artikel
Sprache:	eng
Schlagworte:	Applied sciences Design. Technologies. Operation analysis. Testing Electronics Exact sciences and technology Fluctuation Integrated circuits line edge roughness (LER) Logic gates measurement metal gate Metals MOSFET MOSFET circuits Semiconductor device modeling Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Semiconductor process modeling sensitivity simulation Threshold voltage Transistors variability
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Beschreibung
Zusammenfassung:	Comprehensive 3-D simulations have been carried out and compared with experimental data highlighting the dominant sources of statistical variability in 32-nm high-κ/metal gate MOSFET technology. The statistical variability sources include random discrete dopants, line edge roughness, and metal gate granularity. Their relative importance is highlighted in the numerical simulations. Excellent agreement is achieved between the simulated and measured standard deviation of the threshold voltage.
ISSN:	0741-3106 1558-0563
DOI:	10.1109/LED.2012.2188268