Demonstration of Split-Gate Type Trigate Flash Memory With Highly Suppressed Over-Erase

The functional split-gate type trigate flash memory cell transistors have successfully been fabricated for the first time, and their threshold voltage (V t ) variations before and after NOR-mode program/erase cycle have systematically been compared with the stack-gate ones. It was experimentally fou...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:IEEE electron device letters 2012-03, Vol.33 (3), p.345-347
Hauptverfasser: Kamei, Takahiro, Yongxun Liu, Matsukawa, T., Endo, K., O'uchi, S., Tsukada, J., Yamauchi, H., Ishikawa, Y., Hayashida, T., Sakamoto, K., Ogura, A., Masahara, M.
Format: Artikel
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:The functional split-gate type trigate flash memory cell transistors have successfully been fabricated for the first time, and their threshold voltage (V t ) variations before and after NOR-mode program/erase cycle have systematically been compared with the stack-gate ones. It was experimentally found that split-gate type cell transistors with the same control gate length (L CG ) of 176 nm show much smaller Vt distribution after erase compared to those of stack-gate ones. Moreover, the measured source-drain breakdown voltage (BV DS ) is higher than 3.1 V even the L CG was down to 76 nm. This indicates that the developed split-gate type trigate flash memory is very effective for scaled NOR-type flash memory with highly suppressed over-erase.
ISSN:0741-3106
1558-0563
DOI:10.1109/LED.2011.2181322