Voltage Noise Characteristics of Polysilicon P-I-N Diodes

In this paper, voltage noise of lateral polysilicon p-i-n diodes, biased at constant current levels, is studied. The polysilicon film that forms the active material of the p-i-n diodes was prepared by the crystallization of amorphous silicon either by the solid phase crystallization (SPC) or the sequential lateral solidification (SLS) method; two different thicknesses of 100 and 50 nm were also investigated. Measurement results of the voltage noise at frequency bandwidth from 500 Hz to 1 MHz for polysilicon p-i-n diodes with different crystallization methods and active material thicknesses are presented. The effects of grain size, i-region geometry, and the biasing current on the voltage noise of p-i-n diodes are studied. Furthermore, different methods of improving the voltage noise of p-i-n diodes are also discussed, and experimental results are demonstrated.