Stochastic Networked Computation

In this paper, the stochastic networked computation (SNC) paradigm for designing robust and energy-efficient systems-on-a-chip in nanoscale process technologies, where robust computation is treated as a statistical estimation problem is presented. The benefits of SNC are demonstrated by employing it...

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Veröffentlicht in:IEEE transactions on very large scale integration (VLSI) systems 2010-10, Vol.18 (10), p.1421-1432
Hauptverfasser: Varatkar, Girish Vishnu, Narayanan, Sriram, Shanbhag, Naresh R, Jones, Douglas L
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Sprache:eng
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Zusammenfassung:In this paper, the stochastic networked computation (SNC) paradigm for designing robust and energy-efficient systems-on-a-chip in nanoscale process technologies, where robust computation is treated as a statistical estimation problem is presented. The benefits of SNC are demonstrated by employing it to design an energy-efficient and robust pseudonoise-code acquisition system for the wireless CDMA2000 standard (http://www.3gpp2.org). Simulations in IBM's 130-nm CMOS process show that the SNC-based architecture enhances the average probability of detection (P Det ) in the presence of process variations by two to three orders of magnitude, reduces power by 31%-39%, and reduces the variation in P Det by one to two orders of magnitude at a typical false-alarm rate of 5% over a conventional architecture. SNC performance in the presence of voltage overscaling and across technology nodes (90, 65, 45, and 32 nm) is also studied.
ISSN:1063-8210
1557-9999
DOI:10.1109/TVLSI.2009.2024673