Enhancements of a Circuit-Level Timing Speculation Technique and Their Evaluations Using a Co-simulation Environment : Low-leakage, low-voltage, low-power and high-speed technologies for system LSIs in deep-submicron era

Bibliographische Detailangaben

Veröffentlicht in:	IEICE transactions on electronics 2009, Vol.92 (4), p.483-491
Hauptverfasser:	KUNITAKE, Yuji, MIMA, Kazuhiro, SATO, Toshinori, YASUURA, Hiroto
Format:	Artikel
Sprache:	eng
Schlagworte:	Applied sciences Design. Technologies. Operation analysis. Testing Electronics Exact sciences and technology Integrated circuits Integrated circuits by function (including memories and processors) Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Online-Zugang:	Volltext
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!