Hardware and a Tool Chain for ADRES

Hardware and a Tool Chain for ADRES

Until recently, only a compiler and a high-level simulator of the reconfigurable architecture ADRES existed. This paper focuses on the problems that needed to be solved when moving from a software-only view on the architecture to a real hardware implementation, as well as on the verification process...

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Bibliographische Detailangaben
Hauptverfasser: De Sutter, Bjorn, Mei, Bingfeng, Bartic, Andrei, Aa, Tom Vander, Berekovic, Mladen, Mignolet, Jean-Yves, Croes, Kris, Coene, Paul, Cupac, Miro, Couvreur, Aïssa, Folens, Andy, Dupont, Steven, Van Thielen, Bert, Kanstein, Andreas, Kim, Hong-Seok, Kim, Suk Jin
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Applied sciences
Array Mode
Computers, microcomputers
Electronics
Exact sciences and technology
Hardware
Input-output equipment
Loop Body
Register Rotation
Tool Chain
VHDL Code
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Beschreibung
Zusammenfassung:Until recently, only a compiler and a high-level simulator of the reconfigurable architecture ADRES existed. This paper focuses on the problems that needed to be solved when moving from a software-only view on the architecture to a real hardware implementation, as well as on the verification process of all involved tools.
ISSN:0302-9743
1611-3349
DOI:10.1007/11802839_51