The Utility of Preparing CU Plots Prior to DLTS Scans
Current practice recommends that a preliminary C versus U plot be made before beginning a DLTS scan of a semiconductor junction to select the required bias for the junction and the temperature range for the scan. We feel that it is more appropriate and meaningful to perform a CU study at a later ti...
Gespeichert in:
| Veröffentlicht in: | Physica status solidi. A, Applied research Applied research, 1991-01, Vol.123 (1), p.341-348 |
|---|---|
| Hauptverfasser: | , |
| Format: | Artikel |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 348 |
|---|---|
| container_issue | 1 |
| container_start_page | 341 |
| container_title | Physica status solidi. A, Applied research |
| container_volume | 123 |
| creator | Gross, W. Halder, N. C. |
| description | Current practice recommends that a preliminary C versus U plot be made before beginning a DLTS scan of a semiconductor junction to select the required bias for the junction and the temperature range for the scan. We feel that it is more appropriate and meaningful to perform a CU study at a later time near or at the temperature of the trap emission. This fact is demonstrated by making a series of CU measurements in GaAs (Si‐implanted) Schottky diodes and displaying appropriate three‐dimensional representation of concentration—depth—temperature profiles.
Üblicherweise wird vor einer DLTS‐Untersuchung an einem Halbleiter‐Übergang eine CU‐Messung durchgeführt, um die erforderliche Spannung und den Temperaturbereich zu fixieren. Es scheint jedoch günstiger und sinnvoller zu sein, die CU‐Messung später nahe oder bei der Temperatur der Trap‐Emission vorzunehmen. Dies wird anhand einer Serie von CU‐Messungen an (Si‐implantierten) GaAs‐Schottky‐Dioden und einer dreidimensionalen Darstellung von Konzentrations—Tiefen—Temperatur‐Profilen demonstriert. |
| doi_str_mv | 10.1002/pssa.2211230136 |
| format | Article |
| fullrecord | <record><control><sourceid>istex_pasca</sourceid><recordid>TN_cdi_pascalfrancis_primary_19526186</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>ark_67375_WNG_L5ZP24T5_J</sourcerecordid><originalsourceid>FETCH-LOGICAL-i2736-2224f107bc7e302a4f76458a7f8c4bc4b3e4c40ed07cc4dff2ef955d01a7d0fe3</originalsourceid><addsrcrecordid>eNpFkM9Kw0AQhxdRsFbPXvfiMTr7P8FTqVqVoIGkKF6WbbKrq7EJ2YD2eXwQH8lXMKViYWCYmd83hw-hYwKnBICetSGYU0oJoQwIkztoRAQlEUvk4y4aATASxYkU--gghFcA4KBghOLixeJ572vfr3DjcNbZ1nR--YynP1_fc5zVTR-GrW863Df4Ii1ynJdmGQ7RnjN1sEd_fYzmV5fF9DpK72c300kaeaqYjCil3BFQi1JZBtRwpyQXsVEuLvliKGZ5ycFWoMqSV85R6xIhKiBGVeAsG6OTzd_WhNLUrjPL0gfddv7ddCtNEkElieWQO9_kPnxtV9s76LUdvbajt3Z0lueT7TjQ0Yb2obef_7Tp3rRUTAn9cDfTqXjKKC-EvmW__oZqcw</addsrcrecordid><sourcetype>Index Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype></control><display><type>article</type><title>The Utility of Preparing CU Plots Prior to DLTS Scans</title><source>Wiley Online Library Journals Frontfile Complete</source><creator>Gross, W. ; Halder, N. C.</creator><creatorcontrib>Gross, W. ; Halder, N. C.</creatorcontrib><description>Current practice recommends that a preliminary C versus U plot be made before beginning a DLTS scan of a semiconductor junction to select the required bias for the junction and the temperature range for the scan. We feel that it is more appropriate and meaningful to perform a CU study at a later time near or at the temperature of the trap emission. This fact is demonstrated by making a series of CU measurements in GaAs (Si‐implanted) Schottky diodes and displaying appropriate three‐dimensional representation of concentration—depth—temperature profiles.
Üblicherweise wird vor einer DLTS‐Untersuchung an einem Halbleiter‐Übergang eine CU‐Messung durchgeführt, um die erforderliche Spannung und den Temperaturbereich zu fixieren. Es scheint jedoch günstiger und sinnvoller zu sein, die CU‐Messung später nahe oder bei der Temperatur der Trap‐Emission vorzunehmen. Dies wird anhand einer Serie von CU‐Messungen an (Si‐implantierten) GaAs‐Schottky‐Dioden und einer dreidimensionalen Darstellung von Konzentrations—Tiefen—Temperatur‐Profilen demonstriert.</description><identifier>ISSN: 0031-8965</identifier><identifier>EISSN: 1521-396X</identifier><identifier>DOI: 10.1002/pssa.2211230136</identifier><identifier>CODEN: PSSABA</identifier><language>eng</language><publisher>Berlin: WILEY-VCH Verlag</publisher><subject>Condensed matter: electronic structure, electrical, magnetic, and optical properties ; Electronic structure and electrical properties of surfaces, interfaces, thin films and low-dimensional structures ; Electronic transport in interface structures ; Exact sciences and technology ; Physics</subject><ispartof>Physica status solidi. A, Applied research, 1991-01, Vol.123 (1), p.341-348</ispartof><rights>Copyright © 1991 WILEY‐VCH Verlag GmbH & Co. KGaA</rights><rights>1991 INIST-CNRS</rights><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://onlinelibrary.wiley.com/doi/pdf/10.1002%2Fpssa.2211230136$$EPDF$$P50$$Gwiley$$H</linktopdf><linktohtml>$$Uhttps://onlinelibrary.wiley.com/doi/full/10.1002%2Fpssa.2211230136$$EHTML$$P50$$Gwiley$$H</linktohtml><link.rule.ids>314,778,782,1414,27913,27914,45563,45564</link.rule.ids><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=19526186$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>Gross, W.</creatorcontrib><creatorcontrib>Halder, N. C.</creatorcontrib><title>The Utility of Preparing CU Plots Prior to DLTS Scans</title><title>Physica status solidi. A, Applied research</title><addtitle>phys. stat. sol. (a)</addtitle><description>Current practice recommends that a preliminary C versus U plot be made before beginning a DLTS scan of a semiconductor junction to select the required bias for the junction and the temperature range for the scan. We feel that it is more appropriate and meaningful to perform a CU study at a later time near or at the temperature of the trap emission. This fact is demonstrated by making a series of CU measurements in GaAs (Si‐implanted) Schottky diodes and displaying appropriate three‐dimensional representation of concentration—depth—temperature profiles.
Üblicherweise wird vor einer DLTS‐Untersuchung an einem Halbleiter‐Übergang eine CU‐Messung durchgeführt, um die erforderliche Spannung und den Temperaturbereich zu fixieren. Es scheint jedoch günstiger und sinnvoller zu sein, die CU‐Messung später nahe oder bei der Temperatur der Trap‐Emission vorzunehmen. Dies wird anhand einer Serie von CU‐Messungen an (Si‐implantierten) GaAs‐Schottky‐Dioden und einer dreidimensionalen Darstellung von Konzentrations—Tiefen—Temperatur‐Profilen demonstriert.</description><subject>Condensed matter: electronic structure, electrical, magnetic, and optical properties</subject><subject>Electronic structure and electrical properties of surfaces, interfaces, thin films and low-dimensional structures</subject><subject>Electronic transport in interface structures</subject><subject>Exact sciences and technology</subject><subject>Physics</subject><issn>0031-8965</issn><issn>1521-396X</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1991</creationdate><recordtype>article</recordtype><recordid>eNpFkM9Kw0AQhxdRsFbPXvfiMTr7P8FTqVqVoIGkKF6WbbKrq7EJ2YD2eXwQH8lXMKViYWCYmd83hw-hYwKnBICetSGYU0oJoQwIkztoRAQlEUvk4y4aATASxYkU--gghFcA4KBghOLixeJ572vfr3DjcNbZ1nR--YynP1_fc5zVTR-GrW863Df4Ii1ynJdmGQ7RnjN1sEd_fYzmV5fF9DpK72c300kaeaqYjCil3BFQi1JZBtRwpyQXsVEuLvliKGZ5ycFWoMqSV85R6xIhKiBGVeAsG6OTzd_WhNLUrjPL0gfddv7ddCtNEkElieWQO9_kPnxtV9s76LUdvbajt3Z0lueT7TjQ0Yb2obef_7Tp3rRUTAn9cDfTqXjKKC-EvmW__oZqcw</recordid><startdate>19910116</startdate><enddate>19910116</enddate><creator>Gross, W.</creator><creator>Halder, N. C.</creator><general>WILEY-VCH Verlag</general><general>WILEY‐VCH Verlag</general><general>Wiley-VCH</general><scope>BSCLL</scope><scope>IQODW</scope></search><sort><creationdate>19910116</creationdate><title>The Utility of Preparing CU Plots Prior to DLTS Scans</title><author>Gross, W. ; Halder, N. C.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i2736-2224f107bc7e302a4f76458a7f8c4bc4b3e4c40ed07cc4dff2ef955d01a7d0fe3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1991</creationdate><topic>Condensed matter: electronic structure, electrical, magnetic, and optical properties</topic><topic>Electronic structure and electrical properties of surfaces, interfaces, thin films and low-dimensional structures</topic><topic>Electronic transport in interface structures</topic><topic>Exact sciences and technology</topic><topic>Physics</topic><toplevel>online_resources</toplevel><creatorcontrib>Gross, W.</creatorcontrib><creatorcontrib>Halder, N. C.</creatorcontrib><collection>Istex</collection><collection>Pascal-Francis</collection><jtitle>Physica status solidi. A, Applied research</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Gross, W.</au><au>Halder, N. C.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>The Utility of Preparing CU Plots Prior to DLTS Scans</atitle><jtitle>Physica status solidi. A, Applied research</jtitle><addtitle>phys. stat. sol. (a)</addtitle><date>1991-01-16</date><risdate>1991</risdate><volume>123</volume><issue>1</issue><spage>341</spage><epage>348</epage><pages>341-348</pages><issn>0031-8965</issn><eissn>1521-396X</eissn><coden>PSSABA</coden><abstract>Current practice recommends that a preliminary C versus U plot be made before beginning a DLTS scan of a semiconductor junction to select the required bias for the junction and the temperature range for the scan. We feel that it is more appropriate and meaningful to perform a CU study at a later time near or at the temperature of the trap emission. This fact is demonstrated by making a series of CU measurements in GaAs (Si‐implanted) Schottky diodes and displaying appropriate three‐dimensional representation of concentration—depth—temperature profiles.
Üblicherweise wird vor einer DLTS‐Untersuchung an einem Halbleiter‐Übergang eine CU‐Messung durchgeführt, um die erforderliche Spannung und den Temperaturbereich zu fixieren. Es scheint jedoch günstiger und sinnvoller zu sein, die CU‐Messung später nahe oder bei der Temperatur der Trap‐Emission vorzunehmen. Dies wird anhand einer Serie von CU‐Messungen an (Si‐implantierten) GaAs‐Schottky‐Dioden und einer dreidimensionalen Darstellung von Konzentrations—Tiefen—Temperatur‐Profilen demonstriert.</abstract><cop>Berlin</cop><pub>WILEY-VCH Verlag</pub><doi>10.1002/pssa.2211230136</doi><tpages>8</tpages></addata></record> |
| fulltext | fulltext |
| identifier | ISSN: 0031-8965 |
| ispartof | Physica status solidi. A, Applied research, 1991-01, Vol.123 (1), p.341-348 |
| issn | 0031-8965 1521-396X |
| language | eng |
| recordid | cdi_pascalfrancis_primary_19526186 |
| source | Wiley Online Library Journals Frontfile Complete |
| subjects | Condensed matter: electronic structure, electrical, magnetic, and optical properties Electronic structure and electrical properties of surfaces, interfaces, thin films and low-dimensional structures Electronic transport in interface structures Exact sciences and technology Physics |
| title | The Utility of Preparing CU Plots Prior to DLTS Scans |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-15T08%3A50%3A11IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-istex_pasca&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=The%20Utility%20of%20Preparing%20C%EF%A3%BFU%20Plots%20Prior%20to%20DLTS%20Scans&rft.jtitle=Physica%20status%20solidi.%20A,%20Applied%20research&rft.au=Gross,%20W.&rft.date=1991-01-16&rft.volume=123&rft.issue=1&rft.spage=341&rft.epage=348&rft.pages=341-348&rft.issn=0031-8965&rft.eissn=1521-396X&rft.coden=PSSABA&rft_id=info:doi/10.1002/pssa.2211230136&rft_dat=%3Cistex_pasca%3Eark_67375_WNG_L5ZP24T5_J%3C/istex_pasca%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |