A 1.5-V 3.2 Gb/s/pin graphic DDR4 SDRAM with dual-clock system, four-phase input strobing, and low-jitter fully analog DLL : The 2006 asian solid-state circuits conference (A-SSCC'06)

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Veröffentlicht in:	IEEE journal of solid-state circuits 2007, Vol.42 (11), p.2369-2377
Hauptverfasser:	LEE, Ki-Won, CHO, Joo-Hwan, MORAN, Patrick B, AHN, Jin-Hong, CHOI, Byoung-Jin, LEE, Geun-Il, JUNG, Ho-Don, LEE, Woo-Young, PARK, Ki-Chon, JOO, Yong-Suk, CHA, Jae-Hoon, CHOI, Young-Jung
Format:	Artikel
Sprache:	eng
Schlagworte:	Applied sciences Circuit properties Circuits of signal characteristics conditioning (including delay circuits) Design. Technologies. Operation analysis. Testing Electric, optical and optoelectronic circuits Electronic circuits Electronics Exact sciences and technology Integrated circuits Integrated circuits by function (including memories and processors) Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
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ISSN:	0018-9200 1558-173X