Designing a Coarse-Grained Reconfigurable Architecture Using Loop Self-Pipelining

This paper introduces LEAP(Loop Engine on Array Processor), a novel coarse-grained reconfigurable architecture which accelerates applications through Loop Self-Pipelining (LSP) technique. The LSP can provide effective execution mode for application pipelining. By mapping and distributing the express...

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Hauptverfasser: Xu, Jinhui, Wu, Guiming, Dou, Yong, Dong, Yazhuo
Format: Tagungsbericht
Sprache:eng
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Zusammenfassung:This paper introduces LEAP(Loop Engine on Array Processor), a novel coarse-grained reconfigurable architecture which accelerates applications through Loop Self-Pipelining (LSP) technique. The LSP can provide effective execution mode for application pipelining. By mapping and distributing the expression statements of high level programming languages onto processing elements array, the LEAP can step the loop iteration automatically. The LEAP architecture has no centralized control, no centralized multi-port registers and no centralized data memory. The LEAP has the ability to exploit loop-level, instruction-level, and task-level parallelism, and it is suitable choice for stream-based application domains, such as multimedia, DSP and graphics application.
ISSN:0302-9743
1611-3349
DOI:10.1007/11859802_59