Four-Terminal FinFETs Fabricated Using an Etch-Back Gate Separation

Four-Terminal FinFETs Fabricated Using an Etch-Back Gate Separation

A novel resist etch-back process for fabrication of separated-gate four-terminal FinFETs has been investigates. This process enabled co-fabrication of three-terminal (3T) and four-terminal (4T) FinFETs on a same chip. The fabricated 3T-FinFET shows excellent sub-threshold characteristics and drain i...

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Veröffentlicht in:IEEE transactions on nanotechnology 2007-03, Vol.6 (2), p.201-205
Hauptverfasser: Endo, K., Ishikawa, Y., Yongxun Liu, Ishii, K., Matsukawa, T., O'uchi, S., Masahara, M., Sugimata, E., Tsukada, J., Yamauchi, H., Suzuki, E.
Format: Artikel
Sprache:eng
Schlagworte:
Applied sciences
Barriers
CMOS technology
Controllability
Drains
Electronics
Energy consumption
Etch-back
Etching
Exact sciences and technology
Fabrication
FinFET
FinFETs
four-terminal
gate-separation
Gates
Microelectronic fabrication (materials and surfaces technology)
MOSFET circuits
Nanotechnology
Resists
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Separation
Threshold voltage
Transistors
Ultra large scale integration
{\rm V}_{\rm th} control
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Beschreibung
Zusammenfassung:A novel resist etch-back process for fabrication of separated-gate four-terminal FinFETs has been investigates. This process enabled co-fabrication of three-terminal (3T) and four-terminal (4T) FinFETs on a same chip. The fabricated 3T-FinFET shows excellent sub-threshold characteristics and drain induced barrier lowering (DIBL) value whereas the 4T-FinFET provides efficient V th controllability. The effective V th controllability with keeping a small sub-threshold slope has been confirmed in the synchronized double gate (DD) operation mode
ISSN:1536-125X
1941-0085
DOI:10.1109/TNANO.2007.891830