A built-in-self-test scheme for digital to analog converters

This paper describes a new Built-In-Self-Test(BIST) scheme for estimation of static non-linearity errors in digital to analog converters (DACs). The BIST scheme measures each transition and estimates non-linearity errors. It makes use of a sample and subtract circuit and a VCO. The circuit is design...

Ausführliche Beschreibung

Gespeichert in:

Bibliographische Detailangaben
Hauptverfasser:	Sunil Rafeeque, K.P., Vasudevan, V.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Applied sciences Built-in self-test Circuit properties Clocks CMOS technology Counting circuits Design. Technologies. Operation analysis. Testing Digital-analog conversion Electric, optical and optoelectronic circuits Electronic circuits Electronics Exact sciences and technology Frequency measurement Integrated circuits Linearity Oscillators, resonators, synthetizers Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Signal convertors Testing Testing, measurement, noise and reliability Voltage Voltage-controlled oscillators
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!

Beschreibung
Zusammenfassung:	This paper describes a new Built-In-Self-Test(BIST) scheme for estimation of static non-linearity errors in digital to analog converters (DACs). The BIST scheme measures each transition and estimates non-linearity errors. It makes use of a sample and subtract circuit and a VCO. The circuit is designed using 0.35 /spl mu/m CMOS technology from AMS. The simulation results are included in this paper. Errors estimated using the BIST scheme simulation match well with measured errors.
DOI:	10.1109/ICVD.2004.1261065