A Study on Enhanced Dynamic Signature Verification for the Embedded System

A Study on Enhanced Dynamic Signature Verification for the Embedded System

This paper is a research on the dynamic signature verification of error rate which are false rejection rate and false acceptance rate, the size of signature verification engine, the size of the characteristic vectors of a signature, the ability to distinguish similar signatures, and so on. We sugges...

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Bibliographische Detailangaben
Hauptverfasser: Kim, Jin Whan, Cho, Hyuk Gyu, Cha, Eui Young
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Applied sciences
Artificial intelligence
Computer science
control theory
systems
Dynamic Time Warping
Equal Error Rate
Exact sciences and technology
False Acceptance Rate
Handwriting Recognition
Hide Markov Model
Pattern recognition. Digital image processing. Computational geometry
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Beschreibung
Zusammenfassung:This paper is a research on the dynamic signature verification of error rate which are false rejection rate and false acceptance rate, the size of signature verification engine, the size of the characteristic vectors of a signature, the ability to distinguish similar signatures, and so on. We suggest feature extraction and comparison method of the signature verification. Also, we have implemented our system with Java technology for more efficient user interfaces and various OS Platforms and embedded system.
ISSN:0302-9743
1611-3349
DOI:10.1007/11565123_42