High etch rate and low temperature InP backside via etching using HI-based inductively coupled plasma

We have successfully demonstrated a high etch rate and low temperature backside via etching into InP using HI-based ICP. An average InP etch rate of 2.0 /spl mu/m/min at a wafer temperature of 130 /spl deg/C was obtained. Using this etching, 80 /spl mu/m diameter backside vias were formed into 100 /...

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Hauptverfasser: Kotani, K., Kawasaki, T., Miyazaki, T., Yaegassi, S., Yano, H.
Format: Tagungsbericht
Sprache:eng
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Zusammenfassung:We have successfully demonstrated a high etch rate and low temperature backside via etching into InP using HI-based ICP. An average InP etch rate of 2.0 /spl mu/m/min at a wafer temperature of 130 /spl deg/C was obtained. Using this etching, 80 /spl mu/m diameter backside vias were formed into 100 /spl mu/m thick InP with a simple process. The vias show good profile and smooth surface over a 3-inch diameter wafer. From s-parameter measurements, the average via inductance of 12.1 pH was extracted and the inductance coincides with a calculated value. To evaluate reliability, a heat cycle test under a condition of temperature cycling from 150/spl deg/C to -65/spl deg/C was carried out. After testing of 100 cycles, all vias satisfied the test requirements. These results show that our InP backside via process is promising for practical applications.
ISSN:1092-8669
DOI:10.1109/ICIPRM.2004.1442826