Packet Classification Algorithm Using Multiple Subspace Intersecting

Packet Classification Algorithm Using Multiple Subspace Intersecting

Packet classification on multi-fields is difficult and has poor worst-case performance due to its character of multiple dimensions. Thus his paper proposes a efficient hardware algorithm MSI (multiple subspace intersecting) to solve it. MSI cuts each dimension of the classifier into several subspace...

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Hauptverfasser: Tan, Mingfeng, Lu, Zexin, Gao, Lei
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Sprache:eng
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Applied sciences
Clock Cycle
Computer science
control theory
systems
Computer systems and distributed systems. User interface
Exact Match
Exact sciences and technology
Matching Rule
Packet Header
Pipeline Stage
Software
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Lu, Zexin
Gao, Lei
description Packet classification on multi-fields is difficult and has poor worst-case performance due to its character of multiple dimensions. Thus his paper proposes a efficient hardware algorithm MSI (multiple subspace intersecting) to solve it. MSI cuts each dimension of the classifier into several subspaces and then utilizes the parallelism of hardware to do the classification on these subspaces. For a classifier with n rules of width W, MSI needs only less than n[4W+log2(n)] bits. MSI is able to classify 100 M packets/s with pipelined hardware, supports fast incremental update, and has good flexibility in specification of rule and. By simulation, we find MSI has better performance comparing to some existing algorithms.
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fullrecord <record><control><sourceid>pascalfrancis_sprin</sourceid><recordid>TN_cdi_pascalfrancis_primary_17028269</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>17028269</sourcerecordid><originalsourceid>FETCH-LOGICAL-p220t-84efd2e4ab1bffa18d4d46c543db0ad78d25da73f53536fe3a6d47db2d492a233</originalsourceid><addsrcrecordid>eNpNkMtOwzAQRc1LopTu-IBs2CAFPB4ndpZVeVUqAgm6jiaxXUzTJIrdBX9PUFkwm7s4V1eaw9gV8FvgXN0BZCgReAmAR2xWKI2Z5Ag61-KYTSAHSBFlccIufoHQwEVxyiYcuUgLJfGczUL44uMhFIBqwu7fqN7amCwaCsE7X1P0XZvMm003-Pi5S9bBt5vkZd9E3zc2ed9XoafaJss22iHYOo74kp05aoKd_eWUrR8fPhbP6er1abmYr9JeCB5TLa0zwkqqoHKOQBtpZF5nEk3FyShtRGZIocsww9xZpNxIZSphZCFIIE7Z9WG3p1BT4wZqax_KfvA7Gr5LUOPLIi_G3s2hF0bUbuxQVl23DeWvudFj-d8j_gCTZGAr</addsrcrecordid><sourcetype>Index Database</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Packet Classification Algorithm Using Multiple Subspace Intersecting</title><source>Springer Books</source><creator>Tan, Mingfeng ; Lu, Zexin ; Gao, Lei</creator><contributor>Lu, Xicheng ; Zhao, Wei</contributor><creatorcontrib>Tan, Mingfeng ; Lu, Zexin ; Gao, Lei ; Lu, Xicheng ; Zhao, Wei</creatorcontrib><description>Packet classification on multi-fields is difficult and has poor worst-case performance due to its character of multiple dimensions. Thus his paper proposes a efficient hardware algorithm MSI (multiple subspace intersecting) to solve it. MSI cuts each dimension of the classifier into several subspaces and then utilizes the parallelism of hardware to do the classification on these subspaces. For a classifier with n rules of width W, MSI needs only less than n[4W+log2(n)] bits. MSI is able to classify 100 M packets/s with pipelined hardware, supports fast incremental update, and has good flexibility in specification of rule and. By simulation, we find MSI has better performance comparing to some existing algorithms.</description><identifier>ISSN: 0302-9743</identifier><identifier>ISBN: 3540281029</identifier><identifier>ISBN: 9783540281023</identifier><identifier>EISSN: 1611-3349</identifier><identifier>EISBN: 9783540318682</identifier><identifier>EISBN: 3540318682</identifier><identifier>DOI: 10.1007/11534310_113</identifier><language>eng</language><publisher>Berlin, Heidelberg: Springer Berlin Heidelberg</publisher><subject>Applied sciences ; Clock Cycle ; Computer science; control theory; systems ; Computer systems and distributed systems. User interface ; Exact Match ; Exact sciences and technology ; Matching Rule ; Packet Header ; Pipeline Stage ; Software</subject><ispartof>Lecture notes in computer science, 2005, p.1083-1093</ispartof><rights>Springer-Verlag Berlin Heidelberg 2005</rights><rights>2005 INIST-CNRS</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://link.springer.com/content/pdf/10.1007/11534310_113$$EPDF$$P50$$Gspringer$$H</linktopdf><linktohtml>$$Uhttps://link.springer.com/10.1007/11534310_113$$EHTML$$P50$$Gspringer$$H</linktohtml><link.rule.ids>309,310,775,776,780,785,786,789,4036,4037,27902,38232,41418,42487</link.rule.ids><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&amp;idt=17028269$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><contributor>Lu, Xicheng</contributor><contributor>Zhao, Wei</contributor><creatorcontrib>Tan, Mingfeng</creatorcontrib><creatorcontrib>Lu, Zexin</creatorcontrib><creatorcontrib>Gao, Lei</creatorcontrib><title>Packet Classification Algorithm Using Multiple Subspace Intersecting</title><title>Lecture notes in computer science</title><description>Packet classification on multi-fields is difficult and has poor worst-case performance due to its character of multiple dimensions. Thus his paper proposes a efficient hardware algorithm MSI (multiple subspace intersecting) to solve it. MSI cuts each dimension of the classifier into several subspaces and then utilizes the parallelism of hardware to do the classification on these subspaces. For a classifier with n rules of width W, MSI needs only less than n[4W+log2(n)] bits. MSI is able to classify 100 M packets/s with pipelined hardware, supports fast incremental update, and has good flexibility in specification of rule and. By simulation, we find MSI has better performance comparing to some existing algorithms.</description><subject>Applied sciences</subject><subject>Clock Cycle</subject><subject>Computer science; control theory; systems</subject><subject>Computer systems and distributed systems. User interface</subject><subject>Exact Match</subject><subject>Exact sciences and technology</subject><subject>Matching Rule</subject><subject>Packet Header</subject><subject>Pipeline Stage</subject><subject>Software</subject><issn>0302-9743</issn><issn>1611-3349</issn><isbn>3540281029</isbn><isbn>9783540281023</isbn><isbn>9783540318682</isbn><isbn>3540318682</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2005</creationdate><recordtype>conference_proceeding</recordtype><recordid>eNpNkMtOwzAQRc1LopTu-IBs2CAFPB4ndpZVeVUqAgm6jiaxXUzTJIrdBX9PUFkwm7s4V1eaw9gV8FvgXN0BZCgReAmAR2xWKI2Z5Ag61-KYTSAHSBFlccIufoHQwEVxyiYcuUgLJfGczUL44uMhFIBqwu7fqN7amCwaCsE7X1P0XZvMm003-Pi5S9bBt5vkZd9E3zc2ed9XoafaJss22iHYOo74kp05aoKd_eWUrR8fPhbP6er1abmYr9JeCB5TLa0zwkqqoHKOQBtpZF5nEk3FyShtRGZIocsww9xZpNxIZSphZCFIIE7Z9WG3p1BT4wZqax_KfvA7Gr5LUOPLIi_G3s2hF0bUbuxQVl23DeWvudFj-d8j_gCTZGAr</recordid><startdate>2005</startdate><enddate>2005</enddate><creator>Tan, Mingfeng</creator><creator>Lu, Zexin</creator><creator>Gao, Lei</creator><general>Springer Berlin Heidelberg</general><general>Springer</general><scope>IQODW</scope></search><sort><creationdate>2005</creationdate><title>Packet Classification Algorithm Using Multiple Subspace Intersecting</title><author>Tan, Mingfeng ; Lu, Zexin ; Gao, Lei</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-p220t-84efd2e4ab1bffa18d4d46c543db0ad78d25da73f53536fe3a6d47db2d492a233</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2005</creationdate><topic>Applied sciences</topic><topic>Clock Cycle</topic><topic>Computer science; control theory; systems</topic><topic>Computer systems and distributed systems. User interface</topic><topic>Exact Match</topic><topic>Exact sciences and technology</topic><topic>Matching Rule</topic><topic>Packet Header</topic><topic>Pipeline Stage</topic><topic>Software</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Tan, Mingfeng</creatorcontrib><creatorcontrib>Lu, Zexin</creatorcontrib><creatorcontrib>Gao, Lei</creatorcontrib><collection>Pascal-Francis</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Tan, Mingfeng</au><au>Lu, Zexin</au><au>Gao, Lei</au><au>Lu, Xicheng</au><au>Zhao, Wei</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Packet Classification Algorithm Using Multiple Subspace Intersecting</atitle><btitle>Lecture notes in computer science</btitle><date>2005</date><risdate>2005</risdate><spage>1083</spage><epage>1093</epage><pages>1083-1093</pages><issn>0302-9743</issn><eissn>1611-3349</eissn><isbn>3540281029</isbn><isbn>9783540281023</isbn><eisbn>9783540318682</eisbn><eisbn>3540318682</eisbn><abstract>Packet classification on multi-fields is difficult and has poor worst-case performance due to its character of multiple dimensions. Thus his paper proposes a efficient hardware algorithm MSI (multiple subspace intersecting) to solve it. MSI cuts each dimension of the classifier into several subspaces and then utilizes the parallelism of hardware to do the classification on these subspaces. For a classifier with n rules of width W, MSI needs only less than n[4W+log2(n)] bits. MSI is able to classify 100 M packets/s with pipelined hardware, supports fast incremental update, and has good flexibility in specification of rule and. By simulation, we find MSI has better performance comparing to some existing algorithms.</abstract><cop>Berlin, Heidelberg</cop><pub>Springer Berlin Heidelberg</pub><doi>10.1007/11534310_113</doi><tpages>11</tpages></addata></record>
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subjects Applied sciences
Clock Cycle
Computer science
control theory
systems
Computer systems and distributed systems. User interface
Exact Match
Exact sciences and technology
Matching Rule
Packet Header
Pipeline Stage
Software
title Packet Classification Algorithm Using Multiple Subspace Intersecting
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-03T20%3A33%3A51IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-pascalfrancis_sprin&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Packet%20Classification%20Algorithm%20Using%20Multiple%20Subspace%20Intersecting&rft.btitle=Lecture%20notes%20in%20computer%20science&rft.au=Tan,%20Mingfeng&rft.date=2005&rft.spage=1083&rft.epage=1093&rft.pages=1083-1093&rft.issn=0302-9743&rft.eissn=1611-3349&rft.isbn=3540281029&rft.isbn_list=9783540281023&rft_id=info:doi/10.1007/11534310_113&rft_dat=%3Cpascalfrancis_sprin%3E17028269%3C/pascalfrancis_sprin%3E%3Curl%3E%3C/url%3E&rft.eisbn=9783540318682&rft.eisbn_list=3540318682&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true