Analog VLSI Implementation of Adaptive Synapses in Pulsed Neural Networks

An analog VLSI implementation of adaptive synapses being part of an associative memory realised with pulsed neurons is presented. VLSI implementations of dynamic synapses and pulsed neurons are expected to provide robustness and low energy consumption like observed in the human brain. We have developed a VLSI implementation of synaptic connections for an associative memory which is used in a biological inspired image processing system using pulse coded neural networks. The system consists of different layers for feature extraction to decompose the image in several features. The pulsed associative memory is used for completing or binding features. In this paper, we focus on the dynamics and the analog implementation of adaptive synapses. The discussed circuits were designed in a 130 nm CMOS process.