Implementation of Embedded Cores-Based Digital Devices in JBits Java Simulation Environment

This paper proposes test design architecture suitable for built-in self-testing (BIST) of embedded cores-based digital circuits by using a reconfigurable device. In the paper, a sample circuit under test (CUT) and its corresponding space compressor were realized in Java language, downloaded, and the...

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Veröffentlicht in:	Intelligent Information Technology 2004-01, p.315-325
Hauptverfasser:	Assaf, Mansour H., Abielmona, Rami S., Abolghasem, Payam, Das, Sunil R., Petriu, Emil M., Groza, Voicu, Sahinoglu, Mehmet
Format:	Artikel
Sprache:	eng
Schlagworte:	Application Program Interface Applied sciences Artificial intelligence Circuit Under Test Computer science control theory systems Exact sciences and technology Learning and adaptive systems Test Architecture Test Pattern Test Pattern Generator
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Beschreibung
Zusammenfassung:	This paper proposes test design architecture suitable for built-in self-testing (BIST) of embedded cores-based digital circuits by using a reconfigurable device. In the paper, a sample circuit under test (CUT) and its corresponding space compressor were realized in Java language, downloaded, and then tested at runtime in a simulation environment written in JBits.
ISSN:	0302-9743 1611-3349
DOI:	10.1007/978-3-540-30561-3_33