All-digital TX frequency synthesizer and discrete-time receiver for Bluetooth radio in 130-nm CMOS

We present a single-chip fully compliant Bluetooth radio fabricated in a digital 130-nm CMOS process. The transceiver is architectured from the ground up to be compatible with digital deep-submicron CMOS processes and be readily integrated with a digital baseband and application processor. The conve...

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Veröffentlicht in:IEEE journal of solid-state circuits 2004-12, Vol.39 (12), p.2278-2291
Hauptverfasser: Staszewski, R.B., Muhammad, K., Leipold, D., Chih-Ming Hung, Yo-Chuol Ho, Wallberg, J.L., Fernando, C., Maggio, K., Staszewski, R., Jung, T., Jinseok Koh, John, S., Irene Yuanying Deng, Sarda, V., Moreira-Tamayo, O., Mayega, V., Katz, R., Friedman, O., Eliezer, O.E., de-Obaldia, E., Balsara, P.T.
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container_end_page 2291
container_issue 12
container_start_page 2278
container_title IEEE journal of solid-state circuits
container_volume 39
creator Staszewski, R.B.
Muhammad, K.
Leipold, D.
Chih-Ming Hung
Yo-Chuol Ho
Wallberg, J.L.
Fernando, C.
Maggio, K.
Staszewski, R.
Jung, T.
Jinseok Koh
John, S.
Irene Yuanying Deng
Sarda, V.
Moreira-Tamayo, O.
Mayega, V.
Katz, R.
Friedman, O.
Eliezer, O.E.
de-Obaldia, E.
Balsara, P.T.
description We present a single-chip fully compliant Bluetooth radio fabricated in a digital 130-nm CMOS process. The transceiver is architectured from the ground up to be compatible with digital deep-submicron CMOS processes and be readily integrated with a digital baseband and application processor. The conventional RF frequency synthesizer architecture, based on the voltage-controlled oscillator and the phase/frequency detector and charge-pump combination, has been replaced with a digitally controlled oscillator and a time-to-digital converter, respectively. The transmitter architecture takes advantage of the wideband frequency modulation capability of the all-digital phase-locked loop with built-in automatic compensation to ensure modulation accuracy. The receiver employs a discrete-time architecture in which the RF signal is directly sampled and processed using analog and digital signal processing techniques. The complete chip also integrates power management functions and a digital baseband processor. Application of the presented ideas has resulted in significant area and power savings while producing structures that are amenable to migration to more advanced deep-submicron processes, as they become available. The entire IC occupies 10 mm/sup 2/ and consumes 28 mA during transmit and 41 mA during receive at 1.5-V supply.
doi_str_mv 10.1109/JSSC.2004.836345
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Application of the presented ideas has resulted in significant area and power savings while producing structures that are amenable to migration to more advanced deep-submicron processes, as they become available. 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The transceiver is architectured from the ground up to be compatible with digital deep-submicron CMOS processes and be readily integrated with a digital baseband and application processor. The conventional RF frequency synthesizer architecture, based on the voltage-controlled oscillator and the phase/frequency detector and charge-pump combination, has been replaced with a digitally controlled oscillator and a time-to-digital converter, respectively. The transmitter architecture takes advantage of the wideband frequency modulation capability of the all-digital phase-locked loop with built-in automatic compensation to ensure modulation accuracy. The receiver employs a discrete-time architecture in which the RF signal is directly sampled and processed using analog and digital signal processing techniques. The complete chip also integrates power management functions and a digital baseband processor. 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The transceiver is architectured from the ground up to be compatible with digital deep-submicron CMOS processes and be readily integrated with a digital baseband and application processor. The conventional RF frequency synthesizer architecture, based on the voltage-controlled oscillator and the phase/frequency detector and charge-pump combination, has been replaced with a digitally controlled oscillator and a time-to-digital converter, respectively. The transmitter architecture takes advantage of the wideband frequency modulation capability of the all-digital phase-locked loop with built-in automatic compensation to ensure modulation accuracy. The receiver employs a discrete-time architecture in which the RF signal is directly sampled and processed using analog and digital signal processing techniques. The complete chip also integrates power management functions and a digital baseband processor. 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subjects All digital
Applied sciences
Architecture
Baseband
Bluetooth
Circuit properties
CMOS
CMOS process
Digital
direct sampling
discrete time
Electric, optical and optoelectronic circuits
Electronic circuits
Electronics
Exact sciences and technology
Frequency conversion
frequency modulation
Frequency synthesizers
Microprocessors
Microwave circuits, microwave integrated circuits, microwave transmission lines, submillimeter wave circuits
Oscillators, resonators, synthetizers
Phase detection
phase domain
phase-locked loops
Radio
Radio frequencies
Radio frequency
radio receivers
radio transmitters
Radiocommunications
Receivers
Receivers & amplifiers
sampled data circuits
single chip
system-on-chip (SoC)
Telecommunications
Telecommunications and information theory
tranceivers
Transceivers
Transmitters. Receivers
Voltage-controlled oscillators
title All-digital TX frequency synthesizer and discrete-time receiver for Bluetooth radio in 130-nm CMOS
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