A trench-isolated power BiCMOS process with complementary high performance vertical bipolars
A new process for mixed-signal and power management applications is introduced. The process architecture is designed to achieve high V/sub A/, high f/sub T/ complementary 24 V bipolar devices coupled to 0.5 /spl mu/m CMOS and 24 V power MOS. For optimum performance and die size the process uses 1 /s...
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Format: | Tagungsbericht |
Sprache: | eng |
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Zusammenfassung: | A new process for mixed-signal and power management applications is introduced. The process architecture is designed to achieve high V/sub A/, high f/sub T/ complementary 24 V bipolar devices coupled to 0.5 /spl mu/m CMOS and 24 V power MOS. For optimum performance and die size the process uses 1 /spl mu/m wide poly-filled trench isolation. |
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ISSN: | 1088-9299 2378-590X |
DOI: | 10.1109/BIPOL.2002.1042883 |