Embedded deterministic test for low cost manufacturing test

Embedded deterministic test for low cost manufacturing test

This paper introduces embedded deterministic test (EDT) technology, which reduces manufacturing test cost by providing one to two orders of magnitude reduction in scan test data volume and scan test time. The EDT architecture, the compression algorithm, design flow, experimental results, and silicon...

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Hauptverfasser: Rajski, J., Tyszer, J., Kassab, M., Mukherjee, N., Thompson, R., Kun-Han Tsai, Hertwig, A., Tamarapalli, N., Mrugalski, G., Eide, G., Jun Qian
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Applied sciences
Automatic test pattern generation
Automatic testing
Circuit faults
Circuit testing
Costs
Design for testability
Electronics
Exact sciences and technology
Frequency
Graphics
Logic testing
Manufacturing
Testing, measurement, noise and reliability
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Beschreibung
Zusammenfassung:This paper introduces embedded deterministic test (EDT) technology, which reduces manufacturing test cost by providing one to two orders of magnitude reduction in scan test data volume and scan test time. The EDT architecture, the compression algorithm, design flow, experimental results, and silicon implementation are presented.
ISSN:1089-3539
2378-2250
DOI:10.1109/TEST.2002.1041773