A 2.5 Gbps CMOS optical receiver analog front-end
A 3 V, single chip optical receiver analog front-end capable of operating at 2.5 Gbit/s is fabricated in a 0.35 /spl mu/m CMOS technology. The IC contains a transimpedance amplifier (TIA) with 54.5 dB/spl Omega/ conversion gain, f/sub -3 dB/ of 2.5 GHz, and a limiting amplifier with a conversion gai...
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Zusammenfassung: | A 3 V, single chip optical receiver analog front-end capable of operating at 2.5 Gbit/s is fabricated in a 0.35 /spl mu/m CMOS technology. The IC contains a transimpedance amplifier (TIA) with 54.5 dB/spl Omega/ conversion gain, f/sub -3 dB/ of 2.5 GHz, and a limiting amplifier with a conversion gain of 42 dB, f/sub -3 dB/ of 2.3 GHz. The TIA is DC coupled to the limiting amplifier. The measured eye diagram meets the OC-48 transition mask. Input referred noise current is about 800 nA. |
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DOI: | 10.1109/CICC.2002.1012842 |