Practical Considerations in the Synthesis of High Performance Digital Filters for Implementation on FPGAs

The quality of a hardware implementation of a digital filter should be measured in terms of both hardware measures such as hardware cost, throughput and latency, and quality of performance measures such as the degree to which the implemented filter’s frequency response matches a stated ideal. Here, practical considerations for the implementation of high performance digital filters on field programmable gate arrays are outlined, and the effect of design and implementation decisions on both hardware and quality of performance measures are considered. A synthesis system for high performance digital filters is described. Results show that the synthesized filters are slightly smaller than and have twice the throughput of comparable filters synthesized with Altera’s FIR Compiler Megacore Function.