Towards Detection of Coarse-Grain Loop-Level Parallelism in Irregular Computations

This paper presents a new algorithm for the detection of coarse-grain parallelism in loops with complex irregular computations. Loops are represented as directed acyclic graphs whose nodes are the strongly connected components (SCC) that appear in the Gated Single Assignment (GSA) program form, and whose edges are the use-def chains between pairs of SCCs. Loops that can be executed in parallel using run-time support are recognized at compile-time by performing a demand-driven analysis of the corresponding SCC graphs. A prototype was implemented using the infrastructure provided by the Polaris parallelizing compiler. Encouraging experimental results for a suite of real irregular programs are shown.