Synthesizing RTL Hardware from Java Byte Codes

A structural design tool called JHDL was developed to aid in the design of high-performance pre-placed circuit macros for FPGAs [1]. This tool was successfully used to design and field several high-performance reconfigurable computing systems. Examples of systems developed with this tool include a m...

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Bibliographische Detailangaben
Hauptverfasser:	Wirthlin, Michael J., Hutchings, Brad L., Worth, Carl
Format:	Buchkapitel
Sprache:	eng
Schlagworte:	Applied sciences Basic Block Behavioral Description Data Flow Graph Electronics Exact sciences and technology Integrated circuits Integrated circuits by function (including memories and processors) Java Compiler Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Synthesis Tool
Online-Zugang:	Volltext
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Beschreibung
Zusammenfassung:	A structural design tool called JHDL was developed to aid in the design of high-performance pre-placed circuit macros for FPGAs [1]. This tool was successfully used to design and field several high-performance reconfigurable computing systems. Examples of systems developed with this tool include a multi-FPGA sonar beamforming system and an automatic target recognition system. In these examples, the reconfigurable systems developed with JHDL achieve at least an order of magnitude performance improvement over programmable processors by exploiting parameterized module generators.
ISSN:	0302-9743 1611-3349
DOI:	10.1007/3-540-44687-7_13