An all-implanted, self-aligned, GaAs JFET with nonalloyed W/p+-GaAs ohmic gate contact
The authors describe a self-aligned, refractory metal gate contact, enhancement mode, GaAs junction field effect transistor (JFET) where all impurity doping was done by ion implantation. Processing conditions are presented for realizing a high gate turn on voltage ([approximately]1.0 V at 1 mA/mm of...
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| Veröffentlicht in: | IEEE transactions on electron devices 1994-07, Vol.41 (7), p.1078-1082 |
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| container_end_page | 1082 |
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| container_issue | 7 |
| container_start_page | 1078 |
| container_title | IEEE transactions on electron devices |
| container_volume | 41 |
| creator | ZOLPER, J. C BACA, A. G HIETALA, V. M SHUL, R. J HOWARD, A. J RIEGER, D. J SHERWIN, M. E LOVEJOY, M. L HJALMARSON, H. P DRAPER, B. L KLEM, J. F |
| description | The authors describe a self-aligned, refractory metal gate contact, enhancement mode, GaAs junction field effect transistor (JFET) where all impurity doping was done by ion implantation. Processing conditions are presented for realizing a high gate turn on voltage ([approximately]1.0 V at 1 mA/mm of gate current) relative to GaAs MESFET's. The high gate turn-on voltage is the result of optimizing the p+-gate implant and anneal to achieve a nonalloyed ohmic contact between the implanted p[sup +]-GaAs and the sputter deposited tungsten gate contact. Initial nominally 1.0 [mu]m [times] 50 [mu]m n-JFET's have a transconductance of 85 mS/mm and f[sub t] of 11.4 GHz. |
| doi_str_mv | 10.1109/16.293333 |
| format | Article |
| fullrecord | <record><control><sourceid>pascalfrancis_osti_</sourceid><recordid>TN_cdi_osti_scitechconnect_6913417</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>4137669</sourcerecordid><originalsourceid>FETCH-LOGICAL-o209t-f77fe329f67311805f276b7c98ebe67a81fdb1e9de5bece688c1960e0dffcc1e3</originalsourceid><addsrcrecordid>eNotjk1LAzEYhIMoWKsH_0EQb5o272Y3H8dStCoFL34cl2z2TRvZZpcmIP33rta5DMM8DEPINfAZADdzkLPCiFEnZAJVpZiRpTwlE85BMyO0OCcXKX2NUZZlMSEfi0ht17GwGzobM7b3NGHnme3CJv6mlV0k-vL48Ea_Q97S2McR7w_Y0s_5cMf-6n67C45ubEbq-pity5fkzNsu4dW_T8n7OLF8YuvX1fNysWZ9wU1mXimPojBeKgGgeeULJRvljMYGpbIafNsAmharBh1KrR0YyZG33jsHKKbk5rjbpxzq5EJGtx0_RHS5lgZECWqEbo_QYJOznd_b6EKqh33Y2f2hLkEoKY34AZ6DXSE</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype></control><display><type>article</type><title>An all-implanted, self-aligned, GaAs JFET with nonalloyed W/p+-GaAs ohmic gate contact</title><source>IEEE Electronic Library (IEL)</source><creator>ZOLPER, J. C ; BACA, A. G ; HIETALA, V. M ; SHUL, R. J ; HOWARD, A. J ; RIEGER, D. J ; SHERWIN, M. E ; LOVEJOY, M. L ; HJALMARSON, H. P ; DRAPER, B. L ; KLEM, J. F</creator><creatorcontrib>ZOLPER, J. C ; BACA, A. G ; HIETALA, V. M ; SHUL, R. J ; HOWARD, A. J ; RIEGER, D. J ; SHERWIN, M. E ; LOVEJOY, M. L ; HJALMARSON, H. P ; DRAPER, B. L ; KLEM, J. F</creatorcontrib><description>The authors describe a self-aligned, refractory metal gate contact, enhancement mode, GaAs junction field effect transistor (JFET) where all impurity doping was done by ion implantation. Processing conditions are presented for realizing a high gate turn on voltage ([approximately]1.0 V at 1 mA/mm of gate current) relative to GaAs MESFET's. The high gate turn-on voltage is the result of optimizing the p+-gate implant and anneal to achieve a nonalloyed ohmic contact between the implanted p[sup +]-GaAs and the sputter deposited tungsten gate contact. Initial nominally 1.0 [mu]m [times] 50 [mu]m n-JFET's have a transconductance of 85 mS/mm and f[sub t] of 11.4 GHz.</description><identifier>ISSN: 0018-9383</identifier><identifier>EISSN: 1557-9646</identifier><identifier>DOI: 10.1109/16.293333</identifier><identifier>CODEN: IETDAI</identifier><language>eng</language><publisher>New York, NY: Institute of Electrical and Electronics Engineers</publisher><subject>Applied sciences ; ARSENIC COMPOUNDS ; ARSENIDES ; DESIGN ; DOPED MATERIALS ; ELECTRONIC CIRCUITS ; Electronics ; ENGINEERING ; Exact sciences and technology ; FIELD EFFECT TRANSISTORS ; GALLIUM ARSENIDES ; GALLIUM COMPOUNDS ; GATING CIRCUITS ; ION IMPLANTATION ; JUNCTIONS ; MATERIALS ; OPERATION ; PNICTIDES ; SEMICONDUCTOR DEVICES ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; SEMICONDUCTOR JUNCTIONS ; Transistors ; TRANSISTORS 426000 -- Engineering-- Components, Electron Devices & Circuits-- (1990-)</subject><ispartof>IEEE transactions on electron devices, 1994-07, Vol.41 (7), p.1078-1082</ispartof><rights>1994 INIST-CNRS</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>230,314,776,780,881,27901,27902</link.rule.ids><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=4137669$$DView record in Pascal Francis$$Hfree_for_read</backlink><backlink>$$Uhttps://www.osti.gov/biblio/6913417$$D View this record in Osti.gov$$Hfree_for_read</backlink></links><search><creatorcontrib>ZOLPER, J. C</creatorcontrib><creatorcontrib>BACA, A. G</creatorcontrib><creatorcontrib>HIETALA, V. M</creatorcontrib><creatorcontrib>SHUL, R. J</creatorcontrib><creatorcontrib>HOWARD, A. J</creatorcontrib><creatorcontrib>RIEGER, D. J</creatorcontrib><creatorcontrib>SHERWIN, M. E</creatorcontrib><creatorcontrib>LOVEJOY, M. L</creatorcontrib><creatorcontrib>HJALMARSON, H. P</creatorcontrib><creatorcontrib>DRAPER, B. L</creatorcontrib><creatorcontrib>KLEM, J. F</creatorcontrib><title>An all-implanted, self-aligned, GaAs JFET with nonalloyed W/p+-GaAs ohmic gate contact</title><title>IEEE transactions on electron devices</title><description>The authors describe a self-aligned, refractory metal gate contact, enhancement mode, GaAs junction field effect transistor (JFET) where all impurity doping was done by ion implantation. Processing conditions are presented for realizing a high gate turn on voltage ([approximately]1.0 V at 1 mA/mm of gate current) relative to GaAs MESFET's. The high gate turn-on voltage is the result of optimizing the p+-gate implant and anneal to achieve a nonalloyed ohmic contact between the implanted p[sup +]-GaAs and the sputter deposited tungsten gate contact. Initial nominally 1.0 [mu]m [times] 50 [mu]m n-JFET's have a transconductance of 85 mS/mm and f[sub t] of 11.4 GHz.</description><subject>Applied sciences</subject><subject>ARSENIC COMPOUNDS</subject><subject>ARSENIDES</subject><subject>DESIGN</subject><subject>DOPED MATERIALS</subject><subject>ELECTRONIC CIRCUITS</subject><subject>Electronics</subject><subject>ENGINEERING</subject><subject>Exact sciences and technology</subject><subject>FIELD EFFECT TRANSISTORS</subject><subject>GALLIUM ARSENIDES</subject><subject>GALLIUM COMPOUNDS</subject><subject>GATING CIRCUITS</subject><subject>ION IMPLANTATION</subject><subject>JUNCTIONS</subject><subject>MATERIALS</subject><subject>OPERATION</subject><subject>PNICTIDES</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>SEMICONDUCTOR JUNCTIONS</subject><subject>Transistors</subject><subject>TRANSISTORS 426000 -- Engineering-- Components, Electron Devices & Circuits-- (1990-)</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1994</creationdate><recordtype>article</recordtype><recordid>eNotjk1LAzEYhIMoWKsH_0EQb5o272Y3H8dStCoFL34cl2z2TRvZZpcmIP33rta5DMM8DEPINfAZADdzkLPCiFEnZAJVpZiRpTwlE85BMyO0OCcXKX2NUZZlMSEfi0ht17GwGzobM7b3NGHnme3CJv6mlV0k-vL48Ea_Q97S2McR7w_Y0s_5cMf-6n67C45ubEbq-pity5fkzNsu4dW_T8n7OLF8YuvX1fNysWZ9wU1mXimPojBeKgGgeeULJRvljMYGpbIafNsAmharBh1KrR0YyZG33jsHKKbk5rjbpxzq5EJGtx0_RHS5lgZECWqEbo_QYJOznd_b6EKqh33Y2f2hLkEoKY34AZ6DXSE</recordid><startdate>19940701</startdate><enddate>19940701</enddate><creator>ZOLPER, J. C</creator><creator>BACA, A. G</creator><creator>HIETALA, V. M</creator><creator>SHUL, R. J</creator><creator>HOWARD, A. J</creator><creator>RIEGER, D. J</creator><creator>SHERWIN, M. E</creator><creator>LOVEJOY, M. L</creator><creator>HJALMARSON, H. P</creator><creator>DRAPER, B. L</creator><creator>KLEM, J. F</creator><general>Institute of Electrical and Electronics Engineers</general><scope>IQODW</scope><scope>OTOTI</scope></search><sort><creationdate>19940701</creationdate><title>An all-implanted, self-aligned, GaAs JFET with nonalloyed W/p+-GaAs ohmic gate contact</title><author>ZOLPER, J. C ; BACA, A. G ; HIETALA, V. M ; SHUL, R. J ; HOWARD, A. J ; RIEGER, D. J ; SHERWIN, M. E ; LOVEJOY, M. L ; HJALMARSON, H. P ; DRAPER, B. L ; KLEM, J. F</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-o209t-f77fe329f67311805f276b7c98ebe67a81fdb1e9de5bece688c1960e0dffcc1e3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1994</creationdate><topic>Applied sciences</topic><topic>ARSENIC COMPOUNDS</topic><topic>ARSENIDES</topic><topic>DESIGN</topic><topic>DOPED MATERIALS</topic><topic>ELECTRONIC CIRCUITS</topic><topic>Electronics</topic><topic>ENGINEERING</topic><topic>Exact sciences and technology</topic><topic>FIELD EFFECT TRANSISTORS</topic><topic>GALLIUM ARSENIDES</topic><topic>GALLIUM COMPOUNDS</topic><topic>GATING CIRCUITS</topic><topic>ION IMPLANTATION</topic><topic>JUNCTIONS</topic><topic>MATERIALS</topic><topic>OPERATION</topic><topic>PNICTIDES</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>SEMICONDUCTOR JUNCTIONS</topic><topic>Transistors</topic><topic>TRANSISTORS 426000 -- Engineering-- Components, Electron Devices & Circuits-- (1990-)</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>ZOLPER, J. C</creatorcontrib><creatorcontrib>BACA, A. G</creatorcontrib><creatorcontrib>HIETALA, V. M</creatorcontrib><creatorcontrib>SHUL, R. J</creatorcontrib><creatorcontrib>HOWARD, A. J</creatorcontrib><creatorcontrib>RIEGER, D. J</creatorcontrib><creatorcontrib>SHERWIN, M. E</creatorcontrib><creatorcontrib>LOVEJOY, M. L</creatorcontrib><creatorcontrib>HJALMARSON, H. P</creatorcontrib><creatorcontrib>DRAPER, B. L</creatorcontrib><creatorcontrib>KLEM, J. F</creatorcontrib><collection>Pascal-Francis</collection><collection>OSTI.GOV</collection><jtitle>IEEE transactions on electron devices</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>ZOLPER, J. C</au><au>BACA, A. G</au><au>HIETALA, V. M</au><au>SHUL, R. J</au><au>HOWARD, A. J</au><au>RIEGER, D. J</au><au>SHERWIN, M. E</au><au>LOVEJOY, M. L</au><au>HJALMARSON, H. P</au><au>DRAPER, B. L</au><au>KLEM, J. F</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>An all-implanted, self-aligned, GaAs JFET with nonalloyed W/p+-GaAs ohmic gate contact</atitle><jtitle>IEEE transactions on electron devices</jtitle><date>1994-07-01</date><risdate>1994</risdate><volume>41</volume><issue>7</issue><spage>1078</spage><epage>1082</epage><pages>1078-1082</pages><issn>0018-9383</issn><eissn>1557-9646</eissn><coden>IETDAI</coden><abstract>The authors describe a self-aligned, refractory metal gate contact, enhancement mode, GaAs junction field effect transistor (JFET) where all impurity doping was done by ion implantation. Processing conditions are presented for realizing a high gate turn on voltage ([approximately]1.0 V at 1 mA/mm of gate current) relative to GaAs MESFET's. The high gate turn-on voltage is the result of optimizing the p+-gate implant and anneal to achieve a nonalloyed ohmic contact between the implanted p[sup +]-GaAs and the sputter deposited tungsten gate contact. Initial nominally 1.0 [mu]m [times] 50 [mu]m n-JFET's have a transconductance of 85 mS/mm and f[sub t] of 11.4 GHz.</abstract><cop>New York, NY</cop><pub>Institute of Electrical and Electronics Engineers</pub><doi>10.1109/16.293333</doi><tpages>5</tpages></addata></record> |
| fulltext | fulltext |
| identifier | ISSN: 0018-9383 |
| ispartof | IEEE transactions on electron devices, 1994-07, Vol.41 (7), p.1078-1082 |
| issn | 0018-9383 1557-9646 |
| language | eng |
| recordid | cdi_osti_scitechconnect_6913417 |
| source | IEEE Electronic Library (IEL) |
| subjects | Applied sciences ARSENIC COMPOUNDS ARSENIDES DESIGN DOPED MATERIALS ELECTRONIC CIRCUITS Electronics ENGINEERING Exact sciences and technology FIELD EFFECT TRANSISTORS GALLIUM ARSENIDES GALLIUM COMPOUNDS GATING CIRCUITS ION IMPLANTATION JUNCTIONS MATERIALS OPERATION PNICTIDES SEMICONDUCTOR DEVICES Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices SEMICONDUCTOR JUNCTIONS Transistors TRANSISTORS 426000 -- Engineering-- Components, Electron Devices & Circuits-- (1990-) |
| title | An all-implanted, self-aligned, GaAs JFET with nonalloyed W/p+-GaAs ohmic gate contact |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-05T08%3A02%3A02IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-pascalfrancis_osti_&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=An%20all-implanted,%20self-aligned,%20GaAs%20JFET%20with%20nonalloyed%20W/p+-GaAs%20ohmic%20gate%20contact&rft.jtitle=IEEE%20transactions%20on%20electron%20devices&rft.au=ZOLPER,%20J.%20C&rft.date=1994-07-01&rft.volume=41&rft.issue=7&rft.spage=1078&rft.epage=1082&rft.pages=1078-1082&rft.issn=0018-9383&rft.eissn=1557-9646&rft.coden=IETDAI&rft_id=info:doi/10.1109/16.293333&rft_dat=%3Cpascalfrancis_osti_%3E4137669%3C/pascalfrancis_osti_%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |