Room temperature Si {delta}-growth on Ge incorporating high-K dielectric for metal oxide semiconductor applications

A low temperature Al{sub 2}O{sub 3}/4 monolayer amorphous Si gate stack process was demonstrated on p-type Ge wafers using atomic layer deposition and molecular beam epitaxy. Multifrequency capacitance-voltage (C-V) and current-voltage (I-V) characteristics showed excellent electrical properties of...

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Veröffentlicht in:Applied physics letters 2008-07, Vol.93 (2)
Hauptverfasser: Hong, Augustin J., Ogawa, Masaaki, Wang, Kang L., Wang Yong, Zou Jin, Xu Zheng, Yang Yang
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Sprache:eng
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Zusammenfassung:A low temperature Al{sub 2}O{sub 3}/4 monolayer amorphous Si gate stack process was demonstrated on p-type Ge wafers using atomic layer deposition and molecular beam epitaxy. Multifrequency capacitance-voltage (C-V) and current-voltage (I-V) characteristics showed excellent electrical properties of the Pt/Al{sub 2}O{sub 3}/4 ML Si/Ge metal oxide semiconductor capacitor. No kinks from 1 MHz to 4 kHz and a leakage current density of 2.6x10{sup -6} A/cm{sup 2} at 1 V with an equivalent oxide thickness of 2.5 nm. The interface characterization using a conductance method showed that interface trap density at the near midgap was 8x10{sup 12} eV{sup -1} cm{sup -2} and a mean capture cross section of holes was extracted to be 10{sup -16} cm{sup 2}.
ISSN:0003-6951
1077-3118
DOI:10.1063/1.2957476