Reliable techniques for integrated circuit identification and true random number generation using 1.5-transistor flash memory
Flash memory bits, like other integrated circuit (IC) devices, are prone to random variability in their actual versus nominal characteristics. We present the use of 1.5-transistor flash memory cells in physically unclonable functions leveraging their erase speed variability. This type of memory is i...
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Veröffentlicht in: | Integration (Amsterdam) 2019-03, Vol.65 (C), p.263-272 |
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creator | Clark, Lawrence T. Adams, James Holbert, Keith E. |
description | Flash memory bits, like other integrated circuit (IC) devices, are prone to random variability in their actual versus nominal characteristics. We present the use of 1.5-transistor flash memory cells in physically unclonable functions leveraging their erase speed variability. This type of memory is interesting for the internet of things due to its wide availability as intellectual property at foundries. Using experimentally measured results, we show simple methods that provide high reliability with no or limited need for helper data and error correction. High quality fingerprints for IC identification are demonstrated. Moreover, techniques to remove systematic variations from the array response are shown, allowing the resulting binary strings to pass all National Institute of Standards and Technology tests for randomness. Consequently, with low complexity helper functions, true random numbers can be readily produced.
•1.5 transistor flash memory PUF IC device ID with a simple helper function.•Experimental verification of a 1.5 transistor flash memory based TRNG.•Lightweight helper logic allows the flash TRNG to pass the US NIST randomness tests. |
doi_str_mv | 10.1016/j.vlsi.2017.10.001 |
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fullrecord | <record><control><sourceid>proquest_osti_</sourceid><recordid>TN_cdi_osti_scitechconnect_1613840</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><els_id>S0167926017303280</els_id><sourcerecordid>2256123442</sourcerecordid><originalsourceid>FETCH-LOGICAL-c425t-32935555586d52abcbb87da72c8254391b92a432a9f5ee94bad345e5b1bb10f03</originalsourceid><addsrcrecordid>eNp9kc2KFTEQhYMoeB19AVdB192TpJP-ATcyOCoMDIiuQ5KuvlOX7mRM0gOz8N1NaNdmU6H4TnGqDiHvOWs54_31pX1aE7aC8aE0Wsb4C3Li4yCaQQnxkpwKNDST6Nlr8ialCyuEHNSJ_PkBKxq7As3gHjz-3iHRJUSKPsM5mgwzdRjdjpniDD7jgs5kDJ4aP9Mcd6Cx_MJG_b5ZiPQMHuJB7An9mfJWNbkwCVMug5fVpAe6wRbi81vyajFrgnf_6hX5dfvl58235u7-6_ebz3eNk0LlphNTp-ob-1kJY5214zCbQbhRKNlN3E7CyE6YaVEAk7Rm7qQCZbm1nC2suyIfjrkhZdTJYV3WBe_BZc173o2yQh8P6DGGeoasL2GPvvjSQqiei05KUShxUC6GlCIs-jHiZuKz5kzXLPRF1yx0zaL2yqWL6NMhgrLkE0KsHsA7mDFWC3PA_8n_AjkKlCw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>2256123442</pqid></control><display><type>article</type><title>Reliable techniques for integrated circuit identification and true random number generation using 1.5-transistor flash memory</title><source>Elsevier ScienceDirect Journals</source><creator>Clark, Lawrence T. ; Adams, James ; Holbert, Keith E.</creator><creatorcontrib>Clark, Lawrence T. ; Adams, James ; Holbert, Keith E. ; Arizona State Univ., Tempe, AZ (United States)</creatorcontrib><description>Flash memory bits, like other integrated circuit (IC) devices, are prone to random variability in their actual versus nominal characteristics. We present the use of 1.5-transistor flash memory cells in physically unclonable functions leveraging their erase speed variability. This type of memory is interesting for the internet of things due to its wide availability as intellectual property at foundries. Using experimentally measured results, we show simple methods that provide high reliability with no or limited need for helper data and error correction. High quality fingerprints for IC identification are demonstrated. Moreover, techniques to remove systematic variations from the array response are shown, allowing the resulting binary strings to pass all National Institute of Standards and Technology tests for randomness. Consequently, with low complexity helper functions, true random numbers can be readily produced.
•1.5 transistor flash memory PUF IC device ID with a simple helper function.•Experimental verification of a 1.5 transistor flash memory based TRNG.•Lightweight helper logic allows the flash TRNG to pass the US NIST randomness tests.</description><identifier>ISSN: 0167-9260</identifier><identifier>EISSN: 1872-7522</identifier><identifier>DOI: 10.1016/j.vlsi.2017.10.001</identifier><language>eng</language><publisher>Amsterdam: Elsevier B.V</publisher><subject>Computer Science ; Engineering ; Error correction ; Flash memory ; Flash memory (computers) ; Foundries ; Integrated circuits ; Intellectual property ; Internet of Things ; Memory ; Physically unclonable functions ; Random access memory ; Random numbers ; Reliability ; Systematic mismatch ; True random number generation</subject><ispartof>Integration (Amsterdam), 2019-03, Vol.65 (C), p.263-272</ispartof><rights>2017 Elsevier B.V.</rights><rights>Copyright Elsevier BV Mar 2019</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c425t-32935555586d52abcbb87da72c8254391b92a432a9f5ee94bad345e5b1bb10f03</citedby><cites>FETCH-LOGICAL-c425t-32935555586d52abcbb87da72c8254391b92a432a9f5ee94bad345e5b1bb10f03</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://www.sciencedirect.com/science/article/pii/S0167926017303280$$EHTML$$P50$$Gelsevier$$H</linktohtml><link.rule.ids>230,314,776,780,881,3537,27901,27902,65306</link.rule.ids><backlink>$$Uhttps://www.osti.gov/biblio/1613840$$D View this record in Osti.gov$$Hfree_for_read</backlink></links><search><creatorcontrib>Clark, Lawrence T.</creatorcontrib><creatorcontrib>Adams, James</creatorcontrib><creatorcontrib>Holbert, Keith E.</creatorcontrib><creatorcontrib>Arizona State Univ., Tempe, AZ (United States)</creatorcontrib><title>Reliable techniques for integrated circuit identification and true random number generation using 1.5-transistor flash memory</title><title>Integration (Amsterdam)</title><description>Flash memory bits, like other integrated circuit (IC) devices, are prone to random variability in their actual versus nominal characteristics. We present the use of 1.5-transistor flash memory cells in physically unclonable functions leveraging their erase speed variability. This type of memory is interesting for the internet of things due to its wide availability as intellectual property at foundries. Using experimentally measured results, we show simple methods that provide high reliability with no or limited need for helper data and error correction. High quality fingerprints for IC identification are demonstrated. Moreover, techniques to remove systematic variations from the array response are shown, allowing the resulting binary strings to pass all National Institute of Standards and Technology tests for randomness. Consequently, with low complexity helper functions, true random numbers can be readily produced.
•1.5 transistor flash memory PUF IC device ID with a simple helper function.•Experimental verification of a 1.5 transistor flash memory based TRNG.•Lightweight helper logic allows the flash TRNG to pass the US NIST randomness tests.</description><subject>Computer Science</subject><subject>Engineering</subject><subject>Error correction</subject><subject>Flash memory</subject><subject>Flash memory (computers)</subject><subject>Foundries</subject><subject>Integrated circuits</subject><subject>Intellectual property</subject><subject>Internet of Things</subject><subject>Memory</subject><subject>Physically unclonable functions</subject><subject>Random access memory</subject><subject>Random numbers</subject><subject>Reliability</subject><subject>Systematic mismatch</subject><subject>True random number generation</subject><issn>0167-9260</issn><issn>1872-7522</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2019</creationdate><recordtype>article</recordtype><recordid>eNp9kc2KFTEQhYMoeB19AVdB192TpJP-ATcyOCoMDIiuQ5KuvlOX7mRM0gOz8N1NaNdmU6H4TnGqDiHvOWs54_31pX1aE7aC8aE0Wsb4C3Li4yCaQQnxkpwKNDST6Nlr8ialCyuEHNSJ_PkBKxq7As3gHjz-3iHRJUSKPsM5mgwzdRjdjpniDD7jgs5kDJ4aP9Mcd6Cx_MJG_b5ZiPQMHuJB7An9mfJWNbkwCVMug5fVpAe6wRbi81vyajFrgnf_6hX5dfvl58235u7-6_ebz3eNk0LlphNTp-ob-1kJY5214zCbQbhRKNlN3E7CyE6YaVEAk7Rm7qQCZbm1nC2suyIfjrkhZdTJYV3WBe_BZc173o2yQh8P6DGGeoasL2GPvvjSQqiei05KUShxUC6GlCIs-jHiZuKz5kzXLPRF1yx0zaL2yqWL6NMhgrLkE0KsHsA7mDFWC3PA_8n_AjkKlCw</recordid><startdate>20190301</startdate><enddate>20190301</enddate><creator>Clark, Lawrence T.</creator><creator>Adams, James</creator><creator>Holbert, Keith E.</creator><general>Elsevier B.V</general><general>Elsevier BV</general><general>Elsevier</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><scope>OTOTI</scope></search><sort><creationdate>20190301</creationdate><title>Reliable techniques for integrated circuit identification and true random number generation using 1.5-transistor flash memory</title><author>Clark, Lawrence T. ; Adams, James ; Holbert, Keith E.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c425t-32935555586d52abcbb87da72c8254391b92a432a9f5ee94bad345e5b1bb10f03</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2019</creationdate><topic>Computer Science</topic><topic>Engineering</topic><topic>Error correction</topic><topic>Flash memory</topic><topic>Flash memory (computers)</topic><topic>Foundries</topic><topic>Integrated circuits</topic><topic>Intellectual property</topic><topic>Internet of Things</topic><topic>Memory</topic><topic>Physically unclonable functions</topic><topic>Random access memory</topic><topic>Random numbers</topic><topic>Reliability</topic><topic>Systematic mismatch</topic><topic>True random number generation</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Clark, Lawrence T.</creatorcontrib><creatorcontrib>Adams, James</creatorcontrib><creatorcontrib>Holbert, Keith E.</creatorcontrib><creatorcontrib>Arizona State Univ., Tempe, AZ (United States)</creatorcontrib><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>OSTI.GOV</collection><jtitle>Integration (Amsterdam)</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Clark, Lawrence T.</au><au>Adams, James</au><au>Holbert, Keith E.</au><aucorp>Arizona State Univ., Tempe, AZ (United States)</aucorp><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Reliable techniques for integrated circuit identification and true random number generation using 1.5-transistor flash memory</atitle><jtitle>Integration (Amsterdam)</jtitle><date>2019-03-01</date><risdate>2019</risdate><volume>65</volume><issue>C</issue><spage>263</spage><epage>272</epage><pages>263-272</pages><issn>0167-9260</issn><eissn>1872-7522</eissn><abstract>Flash memory bits, like other integrated circuit (IC) devices, are prone to random variability in their actual versus nominal characteristics. We present the use of 1.5-transistor flash memory cells in physically unclonable functions leveraging their erase speed variability. This type of memory is interesting for the internet of things due to its wide availability as intellectual property at foundries. Using experimentally measured results, we show simple methods that provide high reliability with no or limited need for helper data and error correction. High quality fingerprints for IC identification are demonstrated. Moreover, techniques to remove systematic variations from the array response are shown, allowing the resulting binary strings to pass all National Institute of Standards and Technology tests for randomness. Consequently, with low complexity helper functions, true random numbers can be readily produced.
•1.5 transistor flash memory PUF IC device ID with a simple helper function.•Experimental verification of a 1.5 transistor flash memory based TRNG.•Lightweight helper logic allows the flash TRNG to pass the US NIST randomness tests.</abstract><cop>Amsterdam</cop><pub>Elsevier B.V</pub><doi>10.1016/j.vlsi.2017.10.001</doi><tpages>10</tpages></addata></record> |
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source | Elsevier ScienceDirect Journals |
subjects | Computer Science Engineering Error correction Flash memory Flash memory (computers) Foundries Integrated circuits Intellectual property Internet of Things Memory Physically unclonable functions Random access memory Random numbers Reliability Systematic mismatch True random number generation |
title | Reliable techniques for integrated circuit identification and true random number generation using 1.5-transistor flash memory |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-31T11%3A54%3A48IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_osti_&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Reliable%20techniques%20for%20integrated%20circuit%20identification%20and%20true%20random%20number%20generation%20using%201.5-transistor%20flash%20memory&rft.jtitle=Integration%20(Amsterdam)&rft.au=Clark,%20Lawrence%20T.&rft.aucorp=Arizona%20State%20Univ.,%20Tempe,%20AZ%20(United%20States)&rft.date=2019-03-01&rft.volume=65&rft.issue=C&rft.spage=263&rft.epage=272&rft.pages=263-272&rft.issn=0167-9260&rft.eissn=1872-7522&rft_id=info:doi/10.1016/j.vlsi.2017.10.001&rft_dat=%3Cproquest_osti_%3E2256123442%3C/proquest_osti_%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=2256123442&rft_id=info:pmid/&rft_els_id=S0167926017303280&rfr_iscdi=true |