Selective Etching of Dielectric Buffer Layer for Organic Ferroelectric Memory Cell
Ferroelectric random access memory cell (FeRAM) consists of one selection transistor with high switching performance and one memory transistor with large hysteresis. The simple fabrication method for the selection transistor with high mobility and the memory transistor with large hysteresis within o...
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Veröffentlicht in: | Electronic materials letters 2021, 17(5), , pp.406-413 |
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Sprache: | eng |
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Zusammenfassung: | Ferroelectric random access memory cell (FeRAM) consists of one selection transistor with high switching performance and one memory transistor with large hysteresis. The simple fabrication method for the selection transistor with high mobility and the memory transistor with large hysteresis within one cell has been a challenge and not adequately explored. We demonstrated the selective etching of dielectric polymer buffer layer for the organic ferroelectric memory cell. The dielectric buffer layer of polymethylmethacrylate (PMMA) is formed on the ferroelectric gate insulator of poly(vinylidenefluoride-co-trifluoroethylene) [P(VDF-TrFE)] to enhance mobility of selection transistors. The UV ozone was partially treated on the PMMA/P(VDF-TrFE) bilayer which enables the top PMMA layer to be selectively etched due to the large process margin because the UV ozone etch rate of PMMA to P(VDF-TrFE) is more than 50 times. While the selection transistor with the PMMA buffer layer shows an enhanced mobility of 0.2 cm
2
V
−1
s
−1
, the memory transistor undergoing UV ozone etching process with post-annealing exhibits conventional ferroelectric memory properties such as large hysteresis and good memory retention characteristics. In our ferroelectric memory cell, the memory transistor is electrically isolated completely from the high negative bias in the bit-line during switching-off of the selection transistor. Our polymer selective etching for a ferroelectric memory cell is a useful technique in developing nonvolatile polymer FeRAM.
Graphic Abstract
In this work, we proposed a selective etching process to implement a selection transistor and a memory transistor in a ferroelectric memory cell. The difference of etch rates of P(VDF-TrFE) and PMMA by UV ozone (UVO) treatment was investigated, and the effect of the UVO etching and post-annealing on the surface morphology and ferroelectricity of PMMA/P(VDF-TrFE) bilayer were examined. While the OFET with the bilayer shows high on-off current ratio, the selective etched bilayer exhibits good ferroelectric retention characteristics. Finally, we implemented the ferroelectric memory cell without crosstalk between neighboring cells. |
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ISSN: | 1738-8090 2093-6788 |
DOI: | 10.1007/s13391-021-00301-z |