Low Complexity Synchronizer Using Common Autocorrelator for DVB-S2 System
This paper presents an efficient synchronizer architecture using a common autocorrelator for Digital Video Broadcasting via Satellite, Second generation (DVB-S2). To achieve the required performance under the worst channel condition and to implement the efficient H/W resource utilization of function...
Gespeichert in:
Veröffentlicht in: | Journal of semiconductor technology and science 2009, 9(4), , pp.181-186 |
---|---|
Hauptverfasser: | , , , |
Format: | Artikel |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | This paper presents an efficient synchronizer
architecture using a common autocorrelator for Digital
Video Broadcasting via Satellite, Second generation
(DVB-S2). To achieve the required performance under
the worst channel condition and to implement the
efficient H/W resource utilization of functional synchronization
blocks, we propose a new efficient common
autocorrelator structure. The proposed architecture
can decrease about 92% of multipliers and 81% of
adders compared with the direct implementation.
Moreover, the proposed architecture has been
thoroughly verified in XilinxTM Virtex IV and
R&STM SFU (Signaling and Formatting Unit)
broad-cast test equipment. KCI Citation Count: 1 |
---|---|
ISSN: | 1598-1657 2233-4866 |
DOI: | 10.5573/JSTS.2009.9.4.181 |