A High-Linearity Low-Noise Reconfiguration-Based Programmable Gain Amplifier

This paper presents a high-linearity lownoisesmall-size programmable gain amplifier (PGA)based on a new low-noise low-distortion differentialamplifier and a proposed reconfiguration technique. The proposed differential amplifier combines aninverter-based differential pair with an adaptivebiasing circuit to reduce noise and distortion. Thereconfiguration technique saves the chip size by halfby utilizing the same differential pair for the inputtransconductance and load-stage, interchangeably. Fabricated in 0.18-μm CMOS, the proposed PGAshows a dB-linear control range of 21dB in 16 stepsfrom -11 dB to 10 dB with a gain error of less than±0.33 dB, an IIP3 of 7.4~14.5 dBm, a P1dB of -7~1.2dBm, a noise figure of 13dB, and a 3-dB bandwidth of270MHz at the maximum gain, respectively. The PGAoccupies a chip area of 0.04 mm2 and consumes only1.3 mA from the 1.8 V supply. KCI Citation Count: 1