A Channel Model of Scaled RC-dominant Wires for High-Speed Wireline Transceiver Design

This paper explains modeling and analysisof RC-dominant wires for high-speed wirelinetransceiver design. A closed form formula derivedfrom telegrapher’s equation accurately describes afrequency response of an RC-dominant wire, yet it issimple and intuitive for designers to easily understanddesign tr...

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Veröffentlicht in:Journal of semiconductor technology and science 2013, 13(5), 53, pp.482-491
Hauptverfasser: Choi, Minsoo, Sim, Jae-Yoon, Park, Hong-June, Kim, Byungsub
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Sprache:eng
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Zusammenfassung:This paper explains modeling and analysisof RC-dominant wires for high-speed wirelinetransceiver design. A closed form formula derivedfrom telegrapher’s equation accurately describes afrequency response of an RC-dominant wire, yet it issimple and intuitive for designers to easily understanddesign trade-offs without a complex numericalequation solver. This paper explains how the model isderived and how it can help designers in exampletransceiver designs. KCI Citation Count: 4
ISSN:1598-1657
2233-4866
DOI:10.5573/JSTS.2013.13.5.482