대면적 패널 패키징의 휨 해석

Panel Level Packaging (PLP) is a next-generation semiconductor packaging technology which has productivity and cost competitiveness. However, warpage issue is needed to be solved for successful product which occurs during packaging process. Warpage is occurred by a coefficient of thermal expansion (CTE) difference between each material, and this warpage should be minimized. In this study, warpage issue of the PLP induced by molding process and detaching process is investigated. Warpage simulation and optimization are carried out by the ANSYS Workbench. In order to figure out which constituent material critically affects warpage problem, single element is adjusted in the range of properties. After then, the selected influential elements are adjusted to figure out optimized values for meeting the process requirement of warpage. KCI Citation Count: 1