Design of eMMC Controller with Virtual Channels for Multiple Processors

Portable embedded systems includes several non-volatile memory devices for the external storage. Multiple processors and multiple processing are popular and reading and writing data in the storage limit the performance of the system. The conventional architectures combine the devices to a single channel or assign the devices to multiple channels one by one to increase the performance. However, performance improvement depends on the applications due to the various requirements of data transfer. In this paper, we propose architecture for non-volatile memory controller with virtual channels for systems with multiple processors. The proposed architecture has an AMBA AXI master interface for data transfer and an AMBA APB slave interface for writing instructors and reading status and responses to be connected to a host system. Device adapters are connected to the devices and form physical channels. It can respond to the requests of the multiple processors by configuring virtual channels which have a single or multiple physical channels and can be activated independently. The waiting times and the transfer times of memory requests can be traded-off dynamically for the better system performance. An eMMC controller is designed using Verilog-HDL according to the proposed architecture, and is implemented using an FPGA. The operation of the controller is verified by simulation and measurement. KCI Citation Count: 0