Dependence of Program Efficiency on Channel Conditions Regarding NOR-Type Flash Memory Devices Fabricated on a Silicon-on-Insulator (SOI) Substrate

Flash memory devices are fabricated on a silicon-on-insulator (SOI) substrate to satisfy the demand for higher program efficiency occasionally. However, since metal-oxide-semiconductor field-effect transistors (MOSFETs) on SOI substrate have floating bodies and corresponding effects, it is quite dic...

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Veröffentlicht in:Journal of the Korean Physical Society 2008, 53(6), , pp.3422-3426
Hauptverfasser: Cho, Seongjae, Park, Il Han, Lee, Jung Hoon, Son, Younghwan, Lee, Jong Duk, Shin, Hyungcheol, Park, Byung-Gook
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Sprache:eng
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Zusammenfassung:Flash memory devices are fabricated on a silicon-on-insulator (SOI) substrate to satisfy the demand for higher program efficiency occasionally. However, since metal-oxide-semiconductor field-effect transistors (MOSFETs) on SOI substrate have floating bodies and corresponding effects, it is quite dicult to make a precise prediction of the program efficiency for SOI-based NOR-type flash memory devices by making use of the channel hot electron injection (CHEI) mechanism in program operation. In this work, the dependence of the program effociency for SOI-based NOR-type ash memory devices on the channel conditions with regard to the SOI thickness and the SOI doping concentration has been thoroughly investigated by using a numerical device simulation. The state of the silicon channel (fully/partially depleted channel) turns out to be strongly correlated with these process parameters that affect the hole accumulation, which changes the program efficiency. KCI Citation Count: 1
ISSN:0374-4884
1976-8524
DOI:10.3938/jkps.53.3422