Electrical Conduction in Low-dielectric-constant SiOC(-H) Films with Nano-pore Structures Deposited by Using Plasma-enhanced Chemical Vapor Deposition with Dimethyldimethoxysilane /O₂ Precursors

The interconnection of copper (Cu) with low-dielectric-constant interlayer films (low-k) is crucial to improving integrated circuit performance. Integration challenges with new ultra-low-k generation materials include electrical-property and reliability issues. In this study, low-dielectric-constant SiOC(-H) films were deposited on p-type Si(100) substrates by using plasma-enhanced chemical vapor deposition (PECVD) with dimethyldimethoxysilane (DMDMOS) and oxygen gas as precursors. The deposited SiOC(-H) films were then annealed at temperatures from 250 to 450 ℃ in a vacuum. The electrical conduction in the low-dielectric-constant SiOC(-H) films depended on two main conduction mechanisms: Schottky emission (SE) and Poole-Frenkel (PF) emission. We calculated the Schottky barrier height at the interface between the Cu and the SiOC(-H) film for SE conduction and the trap potential well in the SiOC(-H) films for PF conduction. These calculations showed that the leakage current densities were linearly related to the square root of the applied electric field. KCI Citation Count: 1