A Survey on Hardware Prefetching in Shared-Memory Multiprocessors

Memory latency presents a significant obstruction to computer performance. To hide the memory latency, prefetching mechanism is used to retrieve data from the memory before the processor requests it, anticipating near-term data demands. An effective prefetching scheme can reduce cache miss rates and hide memory latency. Prefetching has yielded major advances in both industry and academia; modern high-performance processors nearly universally implement hardware prefetchers. In this paper, we introduce the fundamental concepts underpinning hardware prefetching and survey state-of-the-art hardware prefetching schemes. We delineate common prefetching approaches, analyse their relative merits and limitations, identify key challenges and open research questions. Overall, this paper aims to provide a comprehensive overview of hardware prefetching that highlights critical trends and technologies in this crucial performance optimization domain.