A Methodological Approach to Short Circuit Protection for Low Voltage DC Grids
This thesis aspires to contribute to the technical and regulatory knowledge on LVDC protection that is necessary for a breakthrough of LVDC grids. To this end, the operation of an LVDC grid in normal and fault conditions was analysed extensively. This revealed that a major obstacle for the widesprea...
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Format: | Dissertation |
Sprache: | eng |
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Zusammenfassung: | This thesis aspires to contribute to the technical and regulatory knowledge on LVDC protection that is necessary for a breakthrough of LVDC grids. To this end, the operation of an LVDC grid in normal and fault conditions was analysed extensively. This revealed that a major obstacle for the widespread implementation of LVDC grids is the need for consistent, universally adopted methodologies for the development of their protection, especially concerning the detection, location and interruption of short circuit faults. Therefore, it was evaluated to which extent the established methodology for the design of Low Voltage AC (LVAC) grids and their protection system could be applied to an LVDC grid. This allowed to pinpoint which methods need to be developed in order to obtain an adapted LVDC protection design methodology.
Two major gaps were identified in the current knowledge and standardisation on the short circuit protection of LVDC grids. Firstly, the standardised calculation method for short circuit currents in LVDC is not suitable for the complex LVDC grids emerging today, and no validated alternative methods are available. Secondly, the current approach to short circuit fault detection and interruption relies on the typical AC fault behaviour of a high sustained steady state short circuit current and a periodic zero crossing. However, due to the fact that a DC short circuit displays a significantly different behaviour, this approach is not suitable for the protection of LVDC grids.
Therefore, on the one hand, this thesis proposed a calculation methodology for the short circuit behaviour of LVDC grids. To this end, methods to calculate the response of an individual converter to a DC short circuit in each fault stage were developed. Subsequently, the calculation of converter response during the first fault stage was extended to a methodology for the estimation of the fault behaviour of an entire LVDC nanogrid. The most important attribute of the developed calculation methodology is that it allows to easily assess the influence of the grid characteristics on its fault behaviour. On the other hand, a new approach to the design of LVDC protection strategies was presented. For this purpose, a methodology for the design of fast and selective short circuit fault detection and location algorithms based on local measurements was proposed. The main asset of the design methodology is the inclusion of a sensitivity analysis which allows to determine and improve the bo |
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